2 Via Channel Arrays

Via Channel Array Technology has been successfully used in a variety of TI products that minimizes package dimensions by using smaller ball pitch and utilizing low cost PCB routing. Via Channel technology enables routing channels to escape innermost BGA positions. This has several advantages. First, the via outside diameter (also known as the annular ring) can be larger than it normally would be if it had to be placed between the BGAs in a tighter pitch, because all the vias are placed in special areas called via channels. This makes PCB manufacturing less expensive, because larger vias are possible. Second, the vias are grouped in a radial pattern instead of a series of concentric rings around the middle of the chip, which is the case with normal BGA array PCB routing. The traces are more easily routed out of the inner parts of the chip because they are not restricted to the narrow paths between many rows of vias. The unique outer row routing and the via channel inner routing are two important parts of this technology on the AM62Lx. The AM62Lx BGA Via Channel Array is shown in Figure 2-1.

The first row (the outside row) supports any size trace desired, because the trace comes from the PCB ball land and goes out on the PCB. Normally, the second row traces must be routed in between the first row of the PCB ball lands. The AM62Lx parts allow a 3.2 mil trace/space on interior layers and 3.7 mil/4 mil trace width/space on exterior layers.

Figure 2-2 shows the first two rows of the AM62Lx package and how it is possible to route 3.2 mil traces and spaces in the areas between balls.

Starting at the third row, as with any BGA package, vias are necessary. As stated earlier, the vias are gathered in the via channels, so the only vias that need to be placed in between balls are some of the power vias in areas of ground or power copper pour. In this case, they have no regular via ring because they are located in an area of copper pour where all the surrounding balls share the same net. This is elaborated more in the later section with details on via sharing. Because the via ring is larger than one that would normally fit in between these balls with the required clearance, the layout tool may flag a design rule check (DRC) error; however, this is a false warning because there is no risk of shorting to a nearby pad as they are all on the same net. The rest of the vias must be placed into the via channels as shown below. Figure 2-3 shows how the vias are grouped in the via channels.