SPRADI2 March   2025 AM62L

 

  1.   1
  2.   Trademarks
  3. 1 Introduction
  4. 2 Via Channel Arrays
  5. 3 Width/Spacing Proposal for Escapes
  6. 4 Stackup
  7. 5 Via Sharing
  8. 6 Floorplan Component Placement
  9. 7 Critical Interfaces Impact Placement
  10. 8 Routing Priority
  11. 9 SerDes Interfaces
  12. 10DDR Interfaces
  13. 11Power Decoupling
  14. 12Route Lowest Priority Interfaces Last
  15. 13Summary
  16. 14Revision History

5 Via Sharing

The Via Channel Array BGA pattern implemented on the AM62Lx design offers opportunities for via sharing. Vias are shared across BGA pins, and Figure 5-1 shows the via sharing opportunities for the GND net. Via sharing across BGA pins provides for easier escape routing and also robust electrical connection by connecting multiple pins.

Via Sharing for VSS Figure 5-1 Via Sharing for VSS