SPRADK4 October   2024 AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2OptiFlash Technology
  6. 3OptiFlash Hardware Accelerators
    1. 3.1 RL2_OF Accelerators
      1. 3.1.1 RL2-Flash Cache
      2. 3.1.2 FLC - Fast Local Copy (Image Download Acceleration)
      3. 3.1.3 Region-Based Address Translation (RAT)
    2. 3.2 FSS Accelerators
      1. 3.2.1 On-the-fly-Safety Engine
      2. 3.2.2 On-the-fly-Security Engine
      3. 3.2.3 FOTA HW Engine
  7. 4OptiFlash SW Tooling
    1. 4.1 Smart Placement
    2. 4.2 Smart Layout
    3. 4.3 Optishare
    4. 4.4 Dynamic Overlay
  8. 5Benchmarks and Performance Data
  9. 6Usecases for OptiFlash Accelerators
  10. 7Getting Started With OptiFlash
  11. 8Conclusion

5 Benchmarks and Performance Data

Application benchmarks have been run to measure the XIP performance when executing from external Flash when various OptiFlash components are enabled.


Benchmarks

Figure 5-1 Benchmarks

The application used for benchmarking XIP Performance is an instruction intensive application that simulates an AUTOSAR cache miss rate. The cache miss has been calibrated with real networking application (around 3-4 million instructions miss/second). Performance degradation has been obtained by measuring the processing time when executing the application from external Flash vs On-Chip SRAM (OCSRAM). As can be seen from Figure 5-1, after enabling RL2 Flash Cache, there is a significant improvement in XIP Performance seen with increasing cache size (up to 1.1x times than that of OCSRAM with 128KB cache).

Note that this is one example case study. The real application can have different performance improvement based on actual traffic pattern.