SPRUIM2J May 2020 – May 2026 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Register Description: The Global Event Mapping register controls the egress global event index for this unmapped event. This register may also be optionally used to directly set an interrupt status bit by using the irqmode flag.
Formula = (j * 8h); where j = 0 to 41d
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| Instance Name | Physical Address |
|---|---|
| DMASS0_INTAGGR_UNMAP | 4818 8000h + formula |
| 63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| IRQMODE | RESERVED | ||||||
| R/W | NONE | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| UMAPIDX | |||||||
| R/W | |||||||
| FFFFh | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| UMAPIDX | |||||||
| R/W | |||||||
| FFFFh | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 63:32 | RESERVED | NONE | 0h | Reserved |
| 31 | IRQMODE | R/W | 0h | IRQ Mode Flag. When set, this register act like a mapper with bitnum in 5:0 and regnum in 14:6. Reset Source: srst_n |
| 30:16 | RESERVED | NONE | 0h | Reserved |
| 15:0 | UMAPIDX | R/W | FFFFh | Global event index. This field specifies the index of the outgoing global event. Set to 0xFFFF to disable. Reset Source: srst_n |