SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| GPMC0 | ✓ |
| Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
|---|---|---|---|---|---|---|---|
| GPMC0 | PSC0 | GP_Core_CTL | LPSC_GPMC | 15 | OFF | YES | LPSC_main_IP |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| GPMC0 | FICLK | GPMC_FCLK | functional and interface clock | |
| GPMC0 | ICLK | MAIN_SYSCLK0/2 | None |
| Module Instance | Source | Description |
|---|---|---|
| GPMC0 | PSC0 | GPMC0 reset |
| Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
|---|---|---|---|---|---|
| GPMC0 | GPMC0_gpmc_sdmareq_0 | DMASS0_INTAGGR_0_intaggr_levi_pend_26 | DMASS0_INTAGGR_0 | GPMC0 interrupt request | level |
| GPMC0 | GPMC0_gpmc_sinterrupt_0 | GICSS0_spi_138 | GICSS0 | GPMC0 interrupt request | level |
| GPMC0 | GPMC0_gpmc_sinterrupt_0 | WKUP_R5FSS0_CORE0_intr_103 | WKUP_R5FSS0_CORE0 | GPMC0 interrupt request | level |