| MCASP0 |
AUX_CLK |
MAIN_PLL2_HSDIV8_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP0_CLKSEL[0:0]=0 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP0 |
AUX_CLK |
MAIN_PLL1_HSDIV6_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP0_CLKSEL[0:0]=1 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP0 |
ACLKR_I |
MCASP0_ACLKR (PIN) |
|
receive audio data clock |
| MCASP0 |
ACLKX_I |
MCASP0_ACLKX (PIN) |
|
transmit audio data clock |
| MCASP0 |
AHCLKR_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[1:0]=0 |
receive audio high frequency clock |
| MCASP0 |
AHCLKR_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP0 |
AHCLKR_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP0 |
AHCLKR_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[1:0]=2 |
receive audio high frequency clock |
| MCASP0 |
AHCLKR_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[1:0]=3 |
receive audio high frequency clock |
| MCASP0 |
AHCLKX_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[9:8]=0 |
transmit audio high frequency clock |
| MCASP0 |
AHCLKX_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP0 |
AHCLKX_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP0 |
AHCLKX_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[9:8]=2 |
transmit audio high frequency clock |
| MCASP0 |
AHCLKX_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP0_AHCLKSEL[9:8]=3 |
transmit audio high frequency clock |
| MCASP0 |
FICLK |
MAIN_SYSCLK0/2 |
|
functional and interface clock |
| MCASP1 |
AUX_CLK |
MAIN_PLL2_HSDIV8_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP1_CLKSEL[0:0]=0 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP1 |
AUX_CLK |
MAIN_PLL1_HSDIV6_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP1_CLKSEL[0:0]=1 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP1 |
ACLKR_I |
MCASP1_ACLKR (PIN) |
|
receive audio data clock |
| MCASP1 |
ACLKX_I |
MCASP1_ACLKX (PIN) |
|
transmit audio data clock |
| MCASP1 |
AHCLKR_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[1:0]=0 |
receive audio high frequency clock |
| MCASP1 |
AHCLKR_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP1 |
AHCLKR_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP1 |
AHCLKR_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[1:0]=2 |
receive audio high frequency clock |
| MCASP1 |
AHCLKR_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[1:0]=3 |
receive audio high frequency clock |
| MCASP1 |
AHCLKX_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[9:8]=0 |
transmit audio high frequency clock |
| MCASP1 |
AHCLKX_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP1 |
AHCLKX_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP1 |
AHCLKX_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[9:8]=2 |
transmit audio high frequency clock |
| MCASP1 |
AHCLKX_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP1_AHCLKSEL[9:8]=3 |
transmit audio high frequency clock |
| MCASP1 |
FICLK |
MAIN_SYSCLK0/2 |
|
functional and interface clock |
| MCASP2 |
AUX_CLK |
MAIN_PLL2_HSDIV8_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP2_CLKSEL[0:0]=0 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP2 |
AUX_CLK |
MAIN_PLL1_HSDIV6_CLKOUT |
MAIN_CTRL_MMR_CFG0_MCASP2_CLKSEL[0:0]=1 |
auxillary clock input. audio clocks are derived from this clock. |
| MCASP2 |
ACLKR_I |
MCASP2_ACLKR (PIN) |
|
receive audio data clock |
| MCASP2 |
ACLKX_I |
MCASP2_ACLKX (PIN) |
|
transmit audio data clock |
| MCASP2 |
AHCLKR_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[1:0]=0 |
receive audio high frequency clock |
| MCASP2 |
AHCLKR_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP2 |
AHCLKR_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[1:0]=1 |
receive audio high frequency clock |
| MCASP2 |
AHCLKR_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[1:0]=2 |
receive audio high frequency clock |
| MCASP2 |
AHCLKR_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[1:0]=3 |
receive audio high frequency clock |
| MCASP2 |
AHCLKX_I |
EXT_REFCLK1 |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[9:8]=0 |
transmit audio high frequency clock |
| MCASP2 |
AHCLKX_I |
CLK_12M_RC |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP2 |
AHCLKX_I |
HFOSC0 (INSTANCE) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[9:8]=1 |
transmit audio high frequency clock |
| MCASP2 |
AHCLKX_I |
AUDIO_EXT_REFCLK0 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[9:8]=2 |
transmit audio high frequency clock |
| MCASP2 |
AHCLKX_I |
AUDIO_EXT_REFCLK1 (PIN) |
MAIN_CTRL_MMR_CFG0_MCASP2_AHCLKSEL[9:8]=3 |
transmit audio high frequency clock |
| MCASP2 |
FICLK |
MAIN_SYSCLK0/2 |
|
functional and interface clock |