SPRUJ09D March   2022  – September 2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Preface: Read This First
    1. 2.1 Sitara MCU+ Academy
    2. 2.2 If You Need Assistance
    3. 2.3 Important Usage Notes
  5. 2Control Card Overview
    1. 3.1 Kit Contents
    2. 3.2 Key Features
    3. 3.3 Component Identification
    4. 3.4 HSEC 180-pin Control Card Docking Station
    5. 3.5 Compliance
  6. 3Board Setup
    1. 4.1 Power Requirements
      1. 4.1.1 Power Input Using USB Type-C Connector
      2. 4.1.2 Power Status LEDs
      3. 4.1.3 Power Tree
      4. 4.1.4 Power Sequence
    2. 4.2 Push Buttons
    3. 4.3 Boot Mode Selection
    4. 4.4 JTAG Path Selection
  7. 4Hardware Description
    1. 5.1  Functional Block Diagram
    2. 5.2  GPIO Mapping
    3. 5.3  Reset
    4. 5.4  Clock
    5. 5.5  Memory Interface
      1. 5.5.1 QSPI
      2. 5.5.2 Board ID EEPROM
    6. 5.6  Ethernet Interface
      1. 5.6.1 RGMII
      2. 5.6.2 PRU-ICSS
      3. 5.6.3 LED Indication in RJ45 Connector
    7. 5.7  I2C
    8. 5.8  Industrial Application LEDs
    9. 5.9  SPI
    10. 5.10 UART
    11. 5.11 MCAN
    12. 5.12 FSI
    13. 5.13 JTAG
    14. 5.14 Test Automation Header
    15. 5.15 LIN
    16. 5.16 MMC
    17. 5.17 ADC and DAC
    18. 5.18 HSEC Pinout and Pinmux Mapping
  8. 5References
    1. 6.1 References
    2. 6.2 Other TI Components Used in This Design
  9.   Revision History
  10.   A E2 Design Changes
  11.   B E1 HSEC Pinout Table

4.2 GPIO Mapping

Table 4-1 GPIO Mapping Table
SI No. GPIO Description GPIO Pin Name Functionality Net Name Active Status
1 Interupt To SoC GPIO21 LIN2_RXD Interrupt SOC_INTn LOW
2 Interupt To DP83826E GPIO66 EPWM12_A Interrupt ICSSM2_PWDN/INTn LOW
3 Interupt To DP83869_01 GPIO67 EPWM11_B Interrupt RGMII1_INT LOW
4 Interupt To DP83869_02 GPIO68 EPWM12_B Interrupt ICSSM1_INT LOW
5 User Defined LED GPIO20 LIN2_TXD GPIO USER_LED0 PREFERABLE
6 User Defined LED GPIO1 QSPI0_CSn1 GPIO USER_LED1 PREFERABLE
IO Expander 01
7 Standby input to CAN tranciever P00 GPIO MCAN1_STB High
8 Enable control to clock buffer P01 Enable CLK_BUF_EN High
9 Select line for ICSSM Mux 1 P02 Mux Selection ICSSM1_MUX_SEL PREFERABLE
10 Select line for ICSSM Mux 2 P03 Mux Selection ICSSM2_MUX_SEL PREFERABLE
11 Reset input to DP83869_01 P04 Reset GPIO_RGMII1_RST LOW
12 Reset input to DP83869_02 P05 Reset GPIO_ICSSM1_RST LOW
13 Reset input to DP83826E P06 Reset GPIO_ICSSM2_RST LOW
14 Enable control to SD load switch P07 Load SW Enable GPIO_uSD_PWR_EN High
15 Select line for RGMII1 MUX P10 Mux Selection RGMII_MUX_SEL PREFERABLE
16 Reset Control to QSPI P11 Reset QSPI0_RESET LOW
17 Select line for I2C0 MUX P12 Mux Selection I2C0_MUX_SEL PREFERABLE
18 GPIO output from TA header to SoC P13 1.2V REG EN TA_GPIO2 PREFERABLE
19 Enable control to 1.7V LDO P14 LDO Enable VPP_LDO_EN High