SPRUJ09D March   2022  – September 2023 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1 , AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Preface: Read This First
    1. 2.1 Sitara MCU+ Academy
    2. 2.2 If You Need Assistance
    3. 2.3 Important Usage Notes
  5. 2Control Card Overview
    1. 3.1 Kit Contents
    2. 3.2 Key Features
    3. 3.3 Component Identification
    4. 3.4 HSEC 180-pin Control Card Docking Station
    5. 3.5 Compliance
  6. 3Board Setup
    1. 4.1 Power Requirements
      1. 4.1.1 Power Input Using USB Type-C Connector
      2. 4.1.2 Power Status LEDs
      3. 4.1.3 Power Tree
      4. 4.1.4 Power Sequence
    2. 4.2 Push Buttons
    3. 4.3 Boot Mode Selection
    4. 4.4 JTAG Path Selection
  7. 4Hardware Description
    1. 5.1  Functional Block Diagram
    2. 5.2  GPIO Mapping
    3. 5.3  Reset
    4. 5.4  Clock
    5. 5.5  Memory Interface
      1. 5.5.1 QSPI
      2. 5.5.2 Board ID EEPROM
    6. 5.6  Ethernet Interface
      1. 5.6.1 RGMII
      2. 5.6.2 PRU-ICSS
      3. 5.6.3 LED Indication in RJ45 Connector
    7. 5.7  I2C
    8. 5.8  Industrial Application LEDs
    9. 5.9  SPI
    10. 5.10 UART
    11. 5.11 MCAN
    12. 5.12 FSI
    13. 5.13 JTAG
    14. 5.14 Test Automation Header
    15. 5.15 LIN
    16. 5.16 MMC
    17. 5.17 ADC and DAC
    18. 5.18 HSEC Pinout and Pinmux Mapping
  8. 5References
    1. 6.1 References
    2. 6.2 Other TI Components Used in This Design
  9.   Revision History
  10.   A E2 Design Changes
  11.   B E1 HSEC Pinout Table

4.14 Test Automation Header

The AM263x Control Card supports a 40 pin test automation header that allows an external controller to manipulate basic operations such as power down, PORz, warm reset, and bootmode control.

GUID-20220426-SS0I-2FCR-QGTN-W7FZWHV3FHMG-low.png Figure 4-23 Test Automation Header

The Test Automation Circuit is powered by a dedicated 3.3 V power supply (VSYS_TA_3V3) that is generated by a 5 V to 3.3 V buck regulator (TPS62177DQCR).

The AM263x SoC I2C2 instance is connected to both the Test Automation Header and the bootmode IO expander (TCA6408ARGTR).

Table 4-14 details the Test Automation GPIO mapping:

Table 4-14 Test Automation Header GPIO Mapping
Signal Name Description Direction
TA_POWERDOWN When logic low, disables the 3.3 V buck regulator (TPS62913RPUR) that is used in the first stage of DC/DC conversion Output
TA_PORZn When logic low, connects the PORz signal to ground due to the PMOS V_GS being less than zero creating a power on reset to the MAIN domain Output
TA_RESETz When logic low, connects the WARMRESETn signal to ground due to the PMOS V_GS being less than zero creating a warm reset to the MAIN domain Output
TA_GPIO1 When logic low, connects the INTn signal to ground due to the PMOS V_GS being less than zero creating an interrupt to the SoC Output
TA_GPIO2 When logic low, disables the 1.2 V buck regulator (TPS62913RPUR) Output
TA_GPIO3 When logic low, disables the bootmode buffer output enable Output
TA_GPIO4 Reset signal for Bootmode IO Expander (TCA6408ARGTR) Output