SPRUJ70A January   2023  – March 2024 AM69

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 Electrostatic Discharge (ESD) Compliance
  4. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J24] With LED for Status [LD4]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW2]
      2. 2.2.2 Reset Pushbutton [SW3]
      3. 2.2.3 User Pushbutton [SW1] With User LED Indication [LD5]
    3. 2.3 Standard Interfaces
      1. 2.3.1 UART-Over-USB [J6] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J10] With Integrated LEDs for Status
      3. 2.3.3 On-Board JTAG/Emulator [J13] with optional External Interface [J15]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J11] [J14]
      5. 2.3.5 Stacked DisplayPort and HDMI Type A [J16]
      6. 2.3.6 PCIe Connector [J3] for PCIe Card Modules
      7. 2.3.7 M.2 Key M Connector [J12] for SSD Modules
      8. 2.3.8 M.2 Key E Connector [J23] for Wi-Fi Networking Modules
      9. 2.3.9 MicroSD Card Cage [J32]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC] With [J22] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J4] [J5] [J8] [J9]
      3. 2.4.3 Expansion Header [J27]
      4. 2.4.4 Camera Interface, 22-Pin Flex Connectors [J1] [J2]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J31] [J30]
      6. 2.4.6 Automation and Control Connector [J17]
  5. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
    5. 3.5 I2C GPIO Expander Mapping
    6. 3.6 Identification EEPROM
  6. 4Revision History

3.5 I2C GPIO Expander Mapping

The EVM uses I2C-based IO expanders for some peripheral control. Table 3-4 explains the functionality of the pins.

Table 3-4 IO Expander Mapping Table
IO EXP PORT NO Net Name Function Dir/Level Remarks
I2C Bus: I2C1, Addr: 0x21 (TCA6408A)
P0 CSI_VIO_SEL CSI I2C/GPIO Voltage Selection Output ‘0’ – 1.8V IO (default)
‘1’ – 3.3V IO
P1 CSI_MUX_SEL_2 CSI Expansion Interface Selection Output CSI I2C MUX select
‘0’ – Camera/Flex
Selected (default)
‘1’ – 40-pin Camera
Expansion Selected
P2 CSI2_RSTz CSI Expansion Interface Reset
P3 IO_EXP_CAM0_GPIO1 Camera #0 Flex Signal (GPIO) Bi-Dir Camera Specific (Pin 17)
P4 IO_EXP_CAM1_GPIO1 Camera #1 Flex Signal (GPIO) Bi-Dir Camera Specific (Pin 17)
I2C Bus: I2C0, Addr: 0x21 (TCA6416A)
P00 BOARDID_EEPROM_WP EEPROM Write Protect Output ‘0’ – EEPROM is NOT
Write Protected (default)
‘1’ – EEPROM is Write Protected
P01 CAN_STB CAN Standby signal Output ‘0’ – Normal Mode
‘1’ – Standby Mode (default)
P02 GPIO_uSD_PWR_EN SD Card Power Enable Output ‘0’ – SD Card Power Disabled
‘1’ – SD Card Power Enable (default)
P03 IO_EXP_MCU_RGMII_RST# Ethernet PHY Reset Output ‘0’ – Ethernet is Reset
‘1’ – Ethernet is NOT Reset (default)
P04 IO_EXP_PCIe0_4L_PERST#
P05 IO_EXP_PCIe1_M.2_RTSz M.2 Key M Interface Signal (RSTz) Output RSTz, See M.2 Key MReset (default)
Specification for more details. (Default = ‘0’)
P06 IO_EXP_PCIe3_M.2_RTSz M.2 Key E Interface Signal (RSTz) Output RSTz, See M.2 Key M
Specification for more details. (Default = ‘0’)
P07 PM_INA_BUS_EN Test Automation I2C translator Output
P10 ENET1_EXP_PWRDN Enable signal for PM2 I2C lines Output
P11 EXP1_ENET_RSTz Power Down Signal for Enet Expansion Header Output
P12 ENET1_I2CMUX_SEL Reset Signal for Enet Expansion Header Output
P13 PCIe0_CLKREQ# I2C mux select Signal for Enet Expansion Header Input
P14 PCIe1_M.2_CLKREQ# PCIe Card Clock request Signal Input
P15 PCIe3_M2_CLKREQ# PCIe M Key Clock request Signal Input
P16 PCIe0_PRSNT2#_1 PCIe E Key Clock request Signal Input
P17 PCIe0_PRSNT2#_2 Reset Signal for PCIe card Slot Input