SPRUJA2B November   2023  – August 2026

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Device Information
    4. 1.4 EVM Revisions and Assembly Variants
    5. 1.5 Specification
  7. 2Hardware
    1. 2.1  Additional Images
    2. 2.2  Key Features
      1. 2.2.1 Processor
      2. 2.2.2 Power Supply
      3. 2.2.3 Memory
      4. 2.2.4 JTAG/Emulator
      5. 2.2.5 Supported Interfaces and Peripherals
      6. 2.2.6 Expansion Connectors/Headers
    3. 2.3  Power Requirement
    4. 2.4  Power ON/OFF Procedure
      1. 2.4.1 Power ON Procedure
      2. 2.4.2 Power OFF Procedure
      3. 2.4.3 Test Points
      4. 2.4.4 Power Indication LED
    5. 2.5  Interface Mapping
    6. 2.6  Clocking
      1. 2.6.1 Peripheral Ref Clock
    7. 2.7  Reset
    8. 2.8  Camera Serial Interface (CSI)
    9. 2.9  Open LVDS Display Interface (OLDI)
    10. 2.10 Display Serial Interface (DSI)
    11. 2.11 Audio Codec Interface
    12. 2.12 HDMI Display
    13. 2.13 JTAG Interface
    14. 2.14 Test Automation Header
    15. 2.15 UART Interface
    16. 2.16 USB Interface
      1. 2.16.1 USB 2.0 Type A Interface
      2. 2.16.2 USB 2.0 Type-C® Interface
    17. 2.17 Memory Interfaces
      1. 2.17.1 LPDDR4 Interface
      2. 2.17.2 Octal Serial Peripheral Interface (OSPI)
      3. 2.17.3 MMC Interfaces
        1. 2.17.3.1 MMC0 - eMMC Interface
        2. 2.17.3.2 MMC1 - Micro SD Interface
        3. 2.17.3.3 MMC2 - M.2 Key E Interface
      4. 2.17.4 Board ID EEPROM
    18. 2.18 Ethernet Interface
      1. 2.18.1 CPSW Ethernet PHY Strapping
      2. 2.18.2 CPSW Ethernet PHY1 Default Configuration
      3. 2.18.3 CPSW Ethernet PHY2 Default Configuration
    19. 2.19 GPIO Port Expander
    20. 2.20 GPIO Mapping
    21. 2.21 Power
      1. 2.21.1 Power Input
      2. 2.21.2 Power Supply
      3. 2.21.3 Power Sequencing
      4. 2.21.4 AM62P SoC Power
      5. 2.21.5 Current Monitoring
    22. 2.22 EVM User Setup and Configuration
      1. 2.22.1 DIP Switches
      2. 2.22.2 Boot Modes
      3. 2.22.3 User Test LEDs
    23. 2.23 Expansion Headers
      1. 2.23.1 User Expansion Connector
      2. 2.23.2 MCU Connector
      3. 2.23.3 GPMC NAND (x8) Connector
    24. 2.24 Interrupt
    25. 2.25 I2C Address Mapping
  8. 3Hardware Design Files
  9. 4Compliance Information
    1. 4.1 Compliance and Certifications
  10. 5Additional Information
    1. 5.1 Known Hardware or Software Issues
      1. 5.1.1 Issue 1 - Watchdog Reset
      2. 5.1.2 Issue 2 - Power Down Sequence
      3. 5.1.3 Issue 3 - Power Cycling Failure Using TIVA
    2. 5.2 Trademarks
    3.     81
  11. 6References
  12. 7Revision History

2.8 Camera Serial Interface (CSI)

The CSI-2 signals from the AM62P SoC are terminated to a 22-pin FFC connector 52435-2271 to interface with commercially available of the shelf CSI-2 standard Camera Card/Modules. All four CSI RX lanes are pinned out on the SK EVM along with SOC_I2C2 instance and a couple of GPIOs from the I2C1 controlled GPIO Port Expander.

SK-AM62P-LP CSIFigure 2-8 CSI
Table 2-7 CSI Camera Connector (J6) Pinout
Pin No Pin Description
1 DGND
2 CSI0_RXN0
3 CSI0_RXP0
4 DGND
5 CSI0_RXN1
6 CSI0_RXP1
7 DGND
8 CSI0_RXCLKN
9 CSI0_RXCLKP
10 DGND
11 CSI0_RXN2
12 CSI0_RXP2
13 DGND
14 CSI0_RXN3
15 CSI0_RXP3
16 DGND
17 CSI_GPIO0
18 CSI_GPIO1
19 DGND
20 CSI_I2C2_SCL
21 CSI_I2C2_SDA
22 VCC_3V3_SYS