| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster0_pend_0 |
GICSS0_spi_108 |
GICSS0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster0_pend_0 |
C7X256V0_CLEC_gic_spi_76 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster0_pend_1 |
C7X256V0_CLEC_soc_events_in_0 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster0_pend_2 |
MCU_R5FSS0_CORE0_cpu0_intr_240 |
MCU_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster0_pend_3 |
WKUP_R5FSS0_CORE0_intr_240 |
WKUP_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster1_pend_0 |
GICSS0_spi_109 |
GICSS0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster1_pend_0 |
C7X256V0_CLEC_gic_spi_77 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster1_pend_1 |
C7X256V0_CLEC_soc_events_in_1 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster1_pend_2 |
MCU_R5FSS0_CORE0_cpu0_intr_241 |
MCU_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster1_pend_3 |
WKUP_R5FSS0_CORE0_intr_241 |
WKUP_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster2_pend_0 |
GICSS0_spi_140 |
GICSS0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster2_pend_0 |
C7X256V0_CLEC_gic_spi_108 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster2_pend_1 |
C7X256V0_CLEC_soc_events_in_2 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster2_pend_2 |
MCU_R5FSS0_CORE0_cpu0_intr_242 |
MCU_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster2_pend_3 |
WKUP_R5FSS0_CORE0_intr_242 |
WKUP_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster3_pend_0 |
GICSS0_spi_141 |
GICSS0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster3_pend_0 |
C7X256V0_CLEC_gic_spi_109 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster3_pend_1 |
C7X256V0_CLEC_soc_events_in_3 |
C7X256V0_CLEC |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster3_pend_2 |
MCU_R5FSS0_CORE0_cpu0_intr_243 |
MCU_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |
| MAILBOX0_MAILBOX_CLUSTER_0 |
MAILBOX0_MAILBOX_CLUSTER_0_mailbox_cluster3_pend_3 |
WKUP_R5FSS0_CORE0_intr_243 |
WKUP_R5FSS0_CORE0 |
MAILBOX0_MAILBOX_CLUSTER_0 interrupt request |
level |