SPRUJG3 March   2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
      1.      Preface: Read This First
        1. 1.1.1.1 Sitara MCU+ Academy
        2. 1.1.1.2 Important Usage Notes
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Component Identification
    4. 1.4 Device Information
      1. 1.4.1 HSEC 180-pin Control Card Docking Station
      2. 1.4.2 Security
  6. 2Hardware
    1. 2.1  Power Requirements
      1. 2.1.1 Power Input Using USB Type-C Connector
      2. 2.1.2 Power Status LEDs
      3. 2.1.3 Power Tree
      4. 2.1.4 Power Sequence
      5. 2.1.5 PMIC
    2. 2.2  Functional Block Diagram
    3. 2.3  Reset
    4. 2.4  Clock
    5. 2.5  Boot Mode Selection
    6. 2.6  JTAG Path Selection
    7. 2.7  Header Information
    8. 2.8  GPIO Mapping
    9. 2.9  Push Buttons
    10. 2.10 Interfaces
      1. 2.10.1  Memory Interface
        1. 2.10.1.1 OSPI
        2. 2.10.1.2 Board ID EEPROM
      2. 2.10.2  Ethernet Interface
        1. 2.10.2.1 Control Card Ethernet Routing
        2. 2.10.2.2 On Board Ethernet PHY
        3. 2.10.2.3 LED Indication in RJ45 Connector
        4. 2.10.2.4 Ethernet Add On Board Connector
      3. 2.10.3  I2C
      4. 2.10.4  Industrial Application LEDs
      5. 2.10.5  SPI
      6. 2.10.6  UART
      7. 2.10.7  MCAN
      8. 2.10.8  FSI
      9. 2.10.9  JTAG
      10. 2.10.10 Test Automation Header
      11. 2.10.11 LIN
      12. 2.10.12 MMC
      13. 2.10.13 ADC and DAC
    11. 2.11 HSEC Pinout and Pinmux Mapping
  7. 3Hardware Design Files
  8. 4Additional Information
    1. 4.1 If You Need Assistance
    2. 4.2 Trademarks
  9. 5Related Documentation
    1. 5.1 Supplemental Content
      1.      5.1.A E2 Design Changes
      2.      5.1.B A Design Changes
  10. 6References
    1. 6.1 Reference Documents
    2. 6.2 Other TI Components Used in This Design
  11. 7Revision History

2.10.1.1 OSPI

The AM263Px-SIP microcontroller has a 64Mb internally connected Silicon in Package (SIP) IS25LX064-LWLA3 OSPI Flash device that operates at up to 133MHz SDR and DDR. The device pins that can typically connect to an external flash are left unconnected with no PCB trace to enable the on-die flash. For the full list of disconnected pins required for the on-die flash to properly operate, see the Pin Connectivity Requirements section in the AM263Px Device Data Sheet.

The on-die OSPI flash reset is sourced from an open-drain equivalent of the device PORz signal. To accomplish this, a MOSFET is implemented with PORz as input, and the output connected to the device OSPI_RESET_OUT0 pin (J3).

AM263Px pin L1 (OSPI_W#) is pulled high to 3.3V logic level, and is implemented using a 4.7kΩ resistor connected to the 3.3V LDO1 PMIC output.

TMDSCNCD263P-SIP OSPI Interface Figure 2-16 OSPI Interface

The QSPI0_D0/D1 signals are used for BOOTMODE control logic. There are 10kΩ resistors used to isolate the BOOTMODE control logic after the value is latched.