SPVA065 June   2026 TIC12400-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2On-Chip ADC Front-End Architecture Overview
  6. 3Understanding the ILKG Specification in the Datasheet
    1. 3.1 Interpretation of the ±110 µA Specification
    2. 3.2 The Leakage Current Is MUX-Activated and Time-Limited
  7. 4Design Considerations with Weak Voltage Sources
    1. 4.1 Definition of a Weak Voltage Source
    2. 4.2 Mechanism of the Sampling Spike
  8. 5Quantitative Model and Error Estimation
    1. 5.1 Voltage Step During the Sampling Window
    2. 5.2 Steady-State Offset with High-Impedance Sources
  9. 6Design Mitigation Methods
    1. 6.1 Method 1: Strengthen the Voltage Source
    2. 6.2 Method 2: External RC Compensation (Recommended)
    3. 6.3 Method 3: Static Offset Calibration
  10. 7Summary
  11. 8References

6.1 Method 1: Strengthen the Voltage Source

The most direct approach is to reduce the Thévenin source impedance seen at the INx pin, so that the transient current injected during the sampling window cannot produce a significant voltage excursion. A low-impedance buffer amplifier placed between the passive network and the INx pin provides an actively driven, low-impedance source that can supply or absorb the ILKG transient current without any measurable deviation at the INx node. This approach completely eliminates the sampling spike and the associated offset, and no additional calibration is required. The trade-off is increased BOM cost, additional PCB area, and the need to power the buffer in all operating modes including low-power sleep states where the TIC12400-Q1 polling is active.