SPVA065 June   2026 TIC12400-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2On-Chip ADC Front-End Architecture Overview
  6. 3Understanding the ILKG Specification in the Datasheet
    1. 3.1 Interpretation of the ±110 µA Specification
    2. 3.2 The Leakage Current Is MUX-Activated and Time-Limited
  7. 4Design Considerations with Weak Voltage Sources
    1. 4.1 Definition of a Weak Voltage Source
    2. 4.2 Mechanism of the Sampling Spike
  8. 5Quantitative Model and Error Estimation
    1. 5.1 Voltage Step During the Sampling Window
    2. 5.2 Steady-State Offset with High-Impedance Sources
  9. 6Design Mitigation Methods
    1. 6.1 Method 1: Strengthen the Voltage Source
    2. 6.2 Method 2: External RC Compensation (Recommended)
    3. 6.3 Method 3: Static Offset Calibration
  10. 7Summary
  11. 8References

6 Design Mitigation Methods

Three complementary approaches are available to manage the effect of MUX-connection transient leakage in 0mA wetting current applications. The choice among them depends on system cost constraints, allowable PCB area, and the required measurement accuracy.