Maximum Sampling Speed: The sampling speed
of the ADC is based on input signal frequency, analog front end, filters, or any
other design parameters that affect sampling.
ADC Reference: Choose the reference to
align with the expected maximum input to utilize the full scale range of the
ADC.
Clock Settings: The clock source
determines the total time for the conversion. The clock divider in tandem with
the SCOMP setting determines the total sampling time. SysConfig sets the
appropriate SCOMP depending on the sampling time setting.
Timer Period: The timer period is based on
how frequently the system needs to sample the input signals. Different
combinations of Timer Clock Divider and Timer Clock Prescaler in SysConfig can
provide the desired resolution.