SSDA007 June   2025 MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1

 

  1.   1
  2. 1Description
  3. 2Required Peripherals
  4. 3Design Steps
  5. 4Design Considerations
  6. 5Software Flowchart
  7. 6Application Code
  8. 7Additional Resources
  9. 8E2E
  10. 9Trademarks

Design Steps

  1. Determine the configuration for the ADCs including reference source, reference value, resolution, and sampling rate based on the given analog input and design requirements.
  2. Determine the period of the timer that triggers the ADCs based on design requirements.
  3. Generate two array buffers with sizes matching those of the DMA transfer size to store all of the ADC conversion results.
  4. In SysConfig, configure the timer as an event publisher to a 1:2 channel and have each ADC configured as a subscriber to the same channel.
  5. Write Application Code to start the timer and process the simultaneously sampled data.