SSDA007 June   2025 MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1

 

  1.   1
  2. 1Description
  3. 2Required Peripherals
  4. 3Design Steps
  5. 4Design Considerations
  6. 5Software Flowchart
  7. 6Application Code
  8. 7Additional Resources
  9. 8E2E
  10. 9Trademarks

2 Required Peripherals

This application requires two integrated ADCs, a DMA module with at least two channels, and a TIM module.

Table 2-1 Required Peripherals
Sub-block FunctionalityPeripheral UseNotes
Analog Signal Capture(2×) ADCShown as ADC12_0_INST and ADC12_1_INST in code
Memory

Transfer

(1×) DMAShown as DMA in code
Event Timer(1x) TIMShown as TIMER_0_INST in code