6 Application Code

#include"ti_msp_dl_config.h"

#define ADC_SAMPLE_SIZE (64)

/* When FIFO is enabled, two 12bit samples are compacted into a single 32bit word */
#define ADC_FIFO_SAMPLES (ADC_SAMPLE_SIZE/2)
uint16_t gADC0Samples[ADC_SAMPLE_SIZE];
uint16_t gADC1Samples[ADC_SAMPLE_SIZE];

volatile bool gADC0Done;
volatile bool gADC1Done;

int main(void) {
   SYSCFG_DL_init(); 
   /* Configure DMA source, destination and size */
   DL_DMA_setSrcAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)DL_ADC12_getFIFOAddress(ADC12_0_INST));
   DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)&gADC0Samples[0]);
   DL_DMA_setTransferSize(DMA, DMA_CH0_CHAN_ID, ADC_FIFO_SAMPLES);
   DL_DMA_enableChannel(DMA, DMA_CH0_CHAN_ID);

   DL_DMA_setSrcAddr(DMA, DMA_CH1_CHAN_ID, (uint32_t)DL_ADC12_getFIFOAddress(ADC12_1_INST));
   DL_DMA_setDestAddr(DMA, DMA_CH1_CHAN_ID, (uint32_t)&gADC1Samples[0]);
   DL_DMA_setTransferSize(DMA, DMA_CH1_CHAN_ID, ADC_FIFO_SAMPLES);
   DL_DMA_enableChannel(DMA, DMA_CH1_CHAN_ID); 

   /* Enable interrupts for both ADCs */
   NVIC_EnableIRQ(ADC12_0_INST_INT_IRQN);
   NVIC_EnableIRQ(ADC12_1_INST_INT_IRQN);
   gADC0Done = false;
   gADC1Done = false; 

   /* Start timer */
   DL_TimerG_startCounter(TIMER_0_INST);
   while (1) {
      while (gADC0Done == false || gADC1Done == false) {
         __WFI(); 
      } 

      /* Breakpoint to check the buffers */
      __BKPT(0);

      /* Reconfigure DMA */
      DL_DMA_setSrcAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)DL_ADC12_getFIFOAddress(ADC12_0_INST));
      DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)&gADC0Samples[0]);
      DL_DMA_setTransferSize(DMA, DMA_CH0_CHAN_ID, ADC_FIFO_SAMPLES);
      DL_DMA_enableChannel(DMA, DMA_CH0_CHAN_ID);

      DL_DMA_setSrcAddr(DMA, DMA_CH1_CHAN_ID, (uint32_t)DL_ADC12_getFIFOAddress(ADC12_1_INST));
      DL_DMA_setDestAddr(DMA, DMA_CH1_CHAN_ID, (uint32_t)&gADC1Samples[0]);
      DL_DMA_setTransferSize(DMA, DMA_CH1_CHAN_ID, ADC_FIFO_SAMPLES);
      DL_DMA_enableChannel(DMA, DMA_CH1_CHAN_ID);
      break;

      gADC0Done = false;
      gADC1Done = false; 
   }
}

void ADC12_0_INST_IRQHandler(void) {
   switch (DL_ADC12_getPendingInterrupt(ADC12_0_INST)) {
   case DL_ADC12_IIDX_DMA_DONE:
      gADC0Done = true;
      DL_ADC12_enableConversions(ADC12_0_INST);
      break;
   default:
      break; 
   }
}

void ADC12_1_INST_IRQHandler(void) {
   switch (DL_ADC12_getPendingInterrupt(ADC12_1_INST)) {
   case DL_ADC12_IIDX_DMA_DONE:
      gADC1Done = true;
      DL_ADC12_enableConversions(ADC12_1_INST);
   default:
      break; 
   }
}