SSDA012 September 2026 MSPM0C1103 , MSPM0C1103-Q1 , MSPM0C1104 , MSPM0C1104-Q1 , MSPM0C1105 , MSPM0C1106 , MSPM0G1105 , MSPM0G1106 , MSPM0G1107 , MSPM0G1505 , MSPM0G1506 , MSPM0G1507 , MSPM0G1518 , MSPM0G1519 , MSPM0G3105 , MSPM0G3105-Q1 , MSPM0G3106 , MSPM0G3106-Q1 , MSPM0G3107 , MSPM0G3107-Q1 , MSPM0G3505 , MSPM0G3505-Q1 , MSPM0G3506 , MSPM0G3506-Q1 , MSPM0G3507 , MSPM0G3507-Q1 , MSPM0G3518 , MSPM0G3518-Q1 , MSPM0G3519 , MSPM0G3519-Q1 , MSPM0H3215 , MSPM0H3216 , MSPM0L1105 , MSPM0L1106 , MSPM0L1117 , MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L1303 , MSPM0L1304 , MSPM0L1304-Q1 , MSPM0L1305 , MSPM0L1305-Q1 , MSPM0L1306 , MSPM0L1306-Q1 , MSPM0L1343 , MSPM0L1344 , MSPM0L1345 , MSPM0L1346 , MSPM0L2227 , MSPM0L2228 , MSPM0L2228-Q1
This subsystem functions as a LIN-to-I2C bridge utilizing an MSPM0 device. The process initiates when the bridge's LIN responder collects data from an external LIN commander; upon detecting a valid message, the data is transferred to the bridge's I²C controller and transmitted to an external I²C target device. The target device then responds with new data, and the bridge subsequently waits for a request from the external LIN commander to transmit the captured data via the bridge's LIN responder. Once the transaction is complete, the bridge resets its states to idle. In the event of an error during any stage, both the I²C and LIN interfaces exhibit specific behaviors to signal a fault to the user. Figure 1-1 illustrates a common hardware configuration used for the LIN-to-I2C subsystem.