STDA057 October   2026 DP83TC815-Q1 , DP83TC817S-Q1 , DP83TD555J-Q1 , DP83TG721S-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2PHY Data Rate Selection and Radar Processing
  6. 3Additional PHY Level Features
    1. 3.1 Low-Power Sleep (TC10)
    2. 3.2 Time Sensitive Networking (IEEE 802.1AS)
    3. 3.3 MACsec (IEEE 802.1AE)
  7. 4TI Ethernet PHY Family and Selection
    1. 4.1 10BASE-T1S Multidrop Ethernet PHYs
    2. 4.2 TI Ethernet PHY Pairing With TI AWR High-Performance Radar SoCs
    3. 4.3 TI Ethernet PHY Pairing With TI AWRL In-Cabin, Near Field Radar SoCs
  8. 5Conclusion

4.2 TI Ethernet PHY Pairing With TI AWR High-Performance Radar SoCs

TI's high-performance automotive radar SoCs expose three main communication interfaces:

  • CSI-2: High-speed serial interface for raw sensor data.
  • Ethernet MAC: The MAC side of the standard IEEE 802.3 Ethernet link (TI radar SoCs support MII, RMII or RGMII configurations).
  • CAN-FD: Flexible data rate CAN interface for control and diagnostics.

Since the MAC conforms to IEEE 802.3, any TI Ethernet PHY can be used with the radar SoC if the data-rate class of the PHY matches the rate supported by the SoC (100BASE-T1 or 1000BASE-T1). When selecting a PHY, the system designer must verify that the select part supports the same speed tier that the radar SoC requires. The listed radar SoC Ethernet speeds are maximum capabilities. For example, the AWR2x44P can be configured for 100M or 10M Ethernet if more edge processing is used on the radar SoC.

Table 4-1 Ethernet Interface Options Available on the AWR Radar SoC Family
Device PHY
AWR2188 CSI-2 (primary)
With edge processing MCU:
DP83TG721 | DP83TC815 | DP83TC817
AWR2x44P DP83TG721
AWR2544 DP83TG721
AWR2x44-ECO DP83TC815 | DP83TC817