SWRA751 September   2022

 

  1.   Introduction
  2.   Trademarks
  3. 1Command Packet
  4. 2Event Packet
  5. 3HCI Commands
    1. 3.1 HCI Commands List Format
    2. 3.2 Support HCI Commands Detailed Description
      1. 3.2.1  HCI_VS_Write_BD_Addr (0xFC06)
      2. 3.2.2  HCI_VS_Write_CODEC_Config (0xFD06)
      3. 3.2.3  HCI_VS_Write_CODEC_Config_Enhanced (0xFD07)
      4. 3.2.4  HCI_VS_DRP_Read_BER_Meter_Result (0xFD13)
      5. 3.2.5  HCI_VS_DRPb_Tester_Con_RX (0xFD17)
      6. 3.2.6  HCI_VS_LE_Enable (0xFD5B)
      7. 3.2.7  HCI_VS_Set_LE_Test_Mode_Parameters (0xFD77)
      8. 3.2.8  HCI_VS_DRPb_Enable_RF_Calibration (0xFD80)
      9. 3.2.9  HCI_VS_DRPb_Tester_Con_TX (0xFD84)
      10. 3.2.10 HCI_VS_DRPb_Tester_Packet_TX_RX (0xFD85)
      11. 3.2.11 HCI_VS_DRPb_Reset (0xFD88)
      12. 3.2.12 HCI_VS_DRPb_BER_Meter_Start (0xFD8B)
      13. 3.2.13 HCI VS LE Read Ber Test Results (0xFDAE)
      14. 3.2.14 HCI_VS_Read_RSSI (0xFDFC)
      15. 3.2.15 HCI_VS_Write_SCO_Configuration (0xFE10)
      16. 3.2.16 HCI_VS_Set_Pcm_Loopback_Enable (0xFE28)
      17. 3.2.17 HCI_VS_Read_Hardware_Register (0xFF00)
      18. 3.2.18 HCI_VS_Write_Hardware_Register (0xFF01)
      19. 3.2.19 HCI_VS_Update_UART_HCI_Baudrate (0xFF36)
      20. 3.2.20 HCI_VS_Set_Supported_Features (0xFF26)
      21. 3.2.21 HCI_VS_HCILL_Parameters (0xFD2B)
      22. 3.2.22 HCI_VS_Sleep_Mode_Configurations (0xFD0C)
      23. 3.2.23 HCI_VS_Get_System_Status (0xFE1F)
      24. 3.2.24 HCI_VS_Read_Patch_Version (0xFF22)
      25. 3.2.25 HCI_VS_DRPb_Set_Power_Vector (0xFD82)
      26. 3.2.26 HCI_VS_DRPb_Set_Class2_Single_Power (0xFD87)
      27. 3.2.27 HCI_VS_LE_Output_Power (0xFDDD)
      28. 3.2.28 HCI_VS_A3DP_Codec_Configuration (0xFD8E)
      29. 3.2.29 HCI_VS_AVPR_Enable (0xFD92)
      30. 3.2.30 HCI_VS_A3DP_Open_Stream (0xFD8C)
      31. 3.2.31 HCI_VS_A3DP_Close_Stream (0xFD8D)
      32. 3.2.32 HCI_VS_A3DP_Start_Stream (0xFD8F)
      33. 3.2.33 HCI_VS_A3DP_Stop_Stream (0xFD90)
      34. 3.2.34 HCI_VS_A3DP_Sink_Codec_Configuration (0xFD9C)
      35. 3.2.35 HCI_VS_A3DP_Sink_Open_Stream (0xFD9A)
      36. 3.2.36 HCI_VS_A3DP_Sink_Close_Stream (0xFD9B)
      37. 3.2.37 HCI_VS_A3DP_Sink_Start_Stream (0xFD9D)
      38. 3.2.38 HCI_VS_A3DP_Sink_Stop_Stream (0xFD9E)
      39. 3.2.39 HCI_VS_WBS_Associate (0xFD78)
      40. 3.2.40 HCI_VS_WBS_Disassociate (0xFD79)
  6. 4General Hardware Errors
  7. 5Revision History

HCI_VS_DRPb_Set_Power_Vector (0xFD82)

Description:

The new transmit power control algorithm is based on the capability to construct power control word for any required power level, based on predetermined ACW and interpolating the required control.

This VS command allows definition of the desired power vector for each modulation scheme, and determination of whether a specific power requires activation of an external PA (in Class1 case).

Note: Each power level (dBm) must be a multiple of 2. For example: for 10 dBm, the value of 10 × 2 (or decimal value of 20) must be used. When configuring power tables, a command must be sent for each modulation type. In addition, after configuring the power vectors, the RF calibration must be initialized
Note: Power level 1 of the GFSK Power Vector is used for BLE power.

Power Level Explanation:

  1. There are only 8 power levels used in the CC256x.
  2. Each power level is separated by 5 dBm.
  3. The default Max TX Power defined in the SP is 12dBm and corresponds to Power Level 15. Therefore, default Power Level 14 is 7dBm, Power Level 13 = 2dBm, and so on.
  4. The Max TX Power Level can be configured using the “BHET” tool. And thus, the rest of the power levels will change as well. But the number of power levels and power level separation does not change.
Table 3-48 GFSK Power Vector Example
Power Level dBm Value in bts file
15 12 0x18
14 7 0x0e
13 2 0x04
12 -3 0xfa
11 -8 0xf0
10 -13 0xe6
9 -18 0xdc
8 -23 0xd2
7 -23 0xd2
6 -23 0xd2
5 -23 0xd2
4 -23 0xd2
3 -23 0xd2
2 -23 0xd2
1 12 0x18
0 -50 0x9c
Table 3-49 Command Parameters HCI_VS_DRPb_Set_Power_Vector (0xFD82) Modulation type, Level n power (n = 0 – 15), tx_power_edr_epc_idx, External PA mode.
Command Parameter Size (bytes) Value Description
Modulation type 1 0x00
0x01
0x02
GFSK
EDR2
EDR3
Level n power (n = 0 – 15) 1 –64 to 16
0xFF
Required RF power for each of the upper 15 power levels (in dBm)
Do not change.
tx_power_edr_epc_idx 1 0xFF Do not change.
External PA mode 2 Bit 1
Bit 15
0xFFFF
1: External PA on @Power level 1; 0: Off
1: External PA on @Power level 15; 0: Off
Do not change.

Procedure For power level vector update:

  1. Set the modulation type for which to update the power level vector.
  2. Set the desired power for each of the upper 15 power levels (in dBm).
  3. Set the external PA mode (on/off) for each of the 16 power levels (bit wise).
  4. Replace the existing power vector commands (x3) in the service pack with updated commands.

The following script shows the commands required to run the example:

#Set BT BR (GFSK) LP Vectors Values (note the need to multiply the output power in dBm by '2')
Send_HCI_VS_DRPb_Set_Power_Vector 0xFD82, 0x00, 0x9c, 0x18, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xd2, 0xdc, 0xe6, 0xf0, 0xfa, 0x04, 0x0e, 0x18, 0xff, 0x0000
Wait_HCI_Command_Complete_VS_DRPb_Set_Power_Vector_Event 5000, 0x00, 0xfd82, 0x00

#Set BT BR EDR 2MB LP Vectors Values (note the need to multiply the output power in dBm by '2')
Send_HCI_VS_DRPb_Set_Power_Vector 0xFD82, 0x01, 0x9c, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xd8, 0xe2, 0xec, 0xf6, 0x00, 0x0a, 0x14, 0xff, 0x0000
Wait_HCI_Command_Complete_VS_DRPb_Set_Power_Vector_Event 5000, 0x00, 0xfd82, 0x00

#Set BT BR EDR 3MB LP Vectors Values (note the need to multiply the output power in dBm by '2')
Send_HCI_VS_DRPb_Set_Power_Vector 0xFD82, 0x02, 0x9c, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xce, 0xd8, 0xe2, 0xec, 0xf6, 0x00, 0x0a, 0x14, 0xff, 0x0000
Wait_HCI_Command_Complete_VS_DRPb_Set_Power_Vector_Event 5000, 0x00, 0xfd82, 0x00

#Set max power level index to be used with a peer device that does not support power control (per LP/HP and per modulation)
Send_HCI_VS_DRPb_Set_Class2_Single_Power 0xFD87, 0x0d, 0x0e, 0x0e
Wait_HCI_Command_Complete_VS_DRPb_Set_Class2_Single_Power_Event 5000, 0x00, 0xfd87, 0x00

#Run TPC (Transmission Power Control) calibration
Send_HCI_VS_DRPb_Enable_RF_Calibration 0xFD80, 0x00, 0x00000800, 0x01   
Wait_HCI_Command_Complete_VS_DRPb_Enable_RF_Calibration_Event 5000, 0x00, 0xfd80, 0x00

Table 3-50 Return Parameters
Returned Value Description Size (bytes) Events Generated
0x00
0x01 – 0xFF
Command succeeded.
Command failed.
1 Command Complete