SWRU629A September   2024  – February 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Wired Connections, Jumper Settings, Buttons, and LEDs
      1. 2.1.1  SWD Interface
      2. 2.1.2  I2C Connections
        1. 2.1.2.1 Default I2C Addresses
      3. 2.1.3  UART Signals
      4. 2.1.4  SD Card Interface
      5. 2.1.5  External Memory Interface
      6. 2.1.6  ADC Interface
      7. 2.1.7  Reset Pullup Jumper
      8. 2.1.8  Push Buttons
      9. 2.1.9  LED Indicators
      10. 2.1.10 LaunchPad Header Pin Assignment
    2. 2.2 Power
      1. 2.2.1 VIO Selection
      2. 2.2.2 Measure the CC35xxE Current Draw
        1. 2.2.2.1 Low Current Measurement (LPDS)
        2. 2.2.2.2 Active Current Measurement
    3. 2.3 Clocking
    4. 2.4 Conducted RF Testing
    5. 2.5 Evaluation Setup
      1. 2.5.1 Wi-Fi Toolbox LP-EM-CC35X1 Hardware Setup
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Revision History

2.1.3 UART Signals

The CC35xxE includes two independent UART peripherals, UART0 and UART1. The LP-EM-CC35X1 allows you to interface with these UART signals through the LaunchPad header pins.

UART1 interface is by default connected to the 20-pin LP-XDS110 header (J7) for serial terminal interface (COM port) to a PC through the LP-XDS110. For more information on this header, see Section 2.1.1.

The routing selection of the UART1 TX and RX signals to header J7 or to the LaunchPad header pins is performed using onboard jumpers, J4 and J6, as seen in the figures below.

LP-EM-CC35X1 UART1 Routed to LP-XDS110Figure 2-6 UART1 Routed to LP-XDS110
LP-EM-CC35X1 UART1 Routed To The LaunchPad HeadersFigure 2-7 UART1 Routed To The LaunchPad Headers

Note: To allow the UART1 signals to route to the designated LaunchPad header pins, 0-ohm resistors can be placed. See Section 2.1.10.