SWRU629A September   2024  – February 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Wired Connections, Jumper Settings, Buttons, and LEDs
      1. 2.1.1  SWD Interface
      2. 2.1.2  I2C Connections
        1. 2.1.2.1 Default I2C Addresses
      3. 2.1.3  UART Signals
      4. 2.1.4  SD Card Interface
      5. 2.1.5  External Memory Interface
      6. 2.1.6  ADC Interface
      7. 2.1.7  Reset Pullup Jumper
      8. 2.1.8  Push Buttons
      9. 2.1.9  LED Indicators
      10. 2.1.10 LaunchPad Header Pin Assignment
    2. 2.2 Power
      1. 2.2.1 VIO Selection
      2. 2.2.2 Measure the CC35xxE Current Draw
        1. 2.2.2.1 Low Current Measurement (LPDS)
        2. 2.2.2.2 Active Current Measurement
    3. 2.3 Clocking
    4. 2.4 Conducted RF Testing
    5. 2.5 Evaluation Setup
      1. 2.5.1 Wi-Fi Toolbox LP-EM-CC35X1 Hardware Setup
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks
  9. 5Revision History

Clocking

The LP-EM-CC35X1 provides two clock inputs to the CC35xxE device:

  • Y2 is a 52MHz crystal for fast clock input.
  • Y1 is a 32.768kHz XTAL for slow clock input.
LP-EM-CC35X1 ClocksFigure 2-22 Clocks

The slow clock can be generated by an external oscillator instead of the XTAL, or generated internally by the CC35xxE.

If the user wants to provide an external slow clock through LaunchPad header pin (pin 2), then:

  • Remove Y1 XTAL .
  • Populate 0-ohm resistor (0201) on the R5 pad.
  • Remove C6 capacitor .

See Figure 2-23.

LP-EM-CC35X1 External Slow ClockFigure 2-23 External Slow Clock

To use the CC35xxE internal slow clock, leave pin 2 floating when Y1 is not placed.