SWRU639 February   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Block Diagram
      1. 2.1.1 Design Considerations
    2. 2.2 Power Requirements
      1. 2.2.1 System Design Theory
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2243
      2. 2.3.2 AM2732R
      3. 2.3.3 LP876242-Q1
      4. 2.3.4 LM62460-Q1
      5. 2.3.5 TCAN1043A-Q1
      6. 2.3.6 TCAN1044A-Q1
      7. 2.3.7 TMP102-Q1
      8. 2.3.8 TPS61379-Q1
      9. 2.3.9 DP83TC812-Q1
    4. 2.4 Virtual Antenna Array
  9. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 Angle Resolution Measurement
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout Recommendations
      1. 4.2.1 20GHz (FMCW) RF LO Sync
      2. 4.2.2 PCB Layer Stackup
    3. 4.3 BOM
  11. 5Tools and Software
  12. 6Related Documentation
    1.     Supplemental Content
  13. 7Additional Information
    1. 7.1 Trademarks
  14. 8Revision History

4.2.2 PCB Layer Stackup

A normal FR4 board material results in unacceptable losses for the 77GHz antenna included in the top two layers of this design. This design uses ceramic material from Rogers Corporation to meet the dielectric requirements. This selection of material results in a lower variation in etched-feature dimensions. With wavelengths of less than 4mm, these tolerances are very important. By routing the 20GHz LO clock (FM_CW) on the same layer as the antennas, only one RO3003 core is required.

AWR2243-2X-CAS-EVM PCB Layer StackupFigure 4-3 PCB Layer Stackup