SWRU639 February   2025

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specifications
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Block Diagram
      1. 2.1.1 Design Considerations
    2. 2.2 Power Requirements
      1. 2.2.1 System Design Theory
    3. 2.3 Highlighted Products
      1. 2.3.1 AWR2243
      2. 2.3.2 AM2732R
      3. 2.3.3 LP876242-Q1
      4. 2.3.4 LM62460-Q1
      5. 2.3.5 TCAN1043A-Q1
      6. 2.3.6 TCAN1044A-Q1
      7. 2.3.7 TMP102-Q1
      8. 2.3.8 TPS61379-Q1
      9. 2.3.9 DP83TC812-Q1
    4. 2.4 Virtual Antenna Array
  9. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 Angle Resolution Measurement
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout Recommendations
      1. 4.2.1 20GHz (FMCW) RF LO Sync
      2. 4.2.2 PCB Layer Stackup
    3. 4.3 BOM
  11. 5Tools and Software
  12. 6Related Documentation
    1.     Supplemental Content
  13. 7Additional Information
    1. 7.1 Trademarks
  14. 8Revision History

20GHz (FMCW) RF LO Sync

This reference design is based on TI’s AWR2243 radar chip. Using the 20GHz LO input and output paths, two of these chips are cascaded together and operated synchronously. This requires that the RF LO frequencies of each chip be synchronized. The AWR2243 synthesizer generates LO between 19GHz and 20.25GHz, depending on the programmed chirp RF output frequencies.

The AWR2243 that is designated as the primary, generates a common Local Oscillator (LO) signal (19GHz to 20.25GHz) to be shared across all the transmitters and receivers in the entire cascade system.

The primary AWR2243 is capable of supplying the shared LO signal on two different output pins through two different delay matched amplifiers. Either or both of these signals, FM_CW_CLKOUT and FM_CW_SYNCOUT, can be used as the source of the LO from the primary to the secondary device. To avoid skew between the LO signals used in both devices, the LO signal input into the primary needs to pass through a trace that is length-matched to the trace between the primary and the secondary devices. As shown in Figure 4-2, one LO signal output is routed with a trace between devices. Then, the other output LO signal from the primary device is looped back to the LO signal input on the primary device using a trace that is the same length.

AWR2243-2X-CAS-EVM LO Clock SignalsFigure 4-1 LO Clock Signals
AWR2243-2X-CAS-EVM LO Clock RoutingFigure 4-2 LO Clock Routing