TIDUEO1B April   2021  – June 2021

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  7. 2System Description
    1. 2.1 Key System Specifications
  8. 3System Overview
    1. 3.1 Block Diagram
    2. 3.2 Design Considerations
      1. 3.2.1 Basic Operation
      2. 3.2.2 PCMC PSFB using C2000
    3. 3.3 System Design Theory
      1. 3.3.1 Peak Current Mode Control (PCMC) Implementation
      2. 3.3.2 Zero Voltage Switching (ZVS) or Low Voltage Switching (LVS)
      3. 3.3.3 Synchronous Rectification
      4. 3.3.4 Slope Compensation
    4. 3.4 Highlighted Products
      1. 3.4.1 C2000™ MCU F28004x
  9. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Required Hardware and Software
      1. 4.1.1 Hardware
      2. 4.1.2 Software
        1. 4.1.2.1 Software Control Flow
        2. 4.1.2.2 Incremental Builds
        3. 4.1.2.3 Procedure for running the incremental builds - PCMC
          1. 4.1.2.3.1 Build 1: Peak Current Loop Check with Open Voltage Loop
            1. 4.1.2.3.1.1 Objective
            2. 4.1.2.3.1.2 Overview
            3. 4.1.2.3.1.3 Procedure
              1. 4.1.2.3.1.3.1 Start CCS and Open a Project
              2. 4.1.2.3.1.3.2 Build and Load the Project
              3. 4.1.2.3.1.3.3 Debug Environment Windows
              4. 4.1.2.3.1.3.4 Using Real-Time Emulation
              5. 4.1.2.3.1.3.5 Run the Code
          2. 4.1.2.3.2 Build 2: Closed current and voltage loop (Full PSFB)
            1. 4.1.2.3.2.1 Objective
            2. 4.1.2.3.2.2 Overview
            3. 4.1.2.3.2.3 Procedure
              1. 4.1.2.3.2.3.1 Build and Load Project
              2. 4.1.2.3.2.3.2 Debug Environment Windows
              3. 4.1.2.3.2.3.3 Run the Code
      3. 4.1.3 Test results
  10. 5Design and Documentation Support
    1. 5.1 Design Files
      1. 5.1.1 Schematics
      2. 5.1.2 BOM
    2. 5.2 Software
    3. 5.3 Documentation Support
  11. 6Terminology
  12. 7About the Author
  13. 8Revision History

System Description

Phase-shifted full bridge (PSFB) DC-DC converters are used frequently to step down high DC bus voltages and provide isolation in medium- to high-power applications like server power supplies, telecom rectifiers, battery charging systems, and renewable energy systems. Traditionally, microcontrollers have been restricted to only performing supervisory or communications tasks in these systems. With the availability of high-performing microcontroller devices, it is now possible to use microcontrollers for closing control loops in these systems, in addition to handling the traditional microcontroller functions. The transition to digital power control means that functions that were previously implemented in hardware are now implemented in software. In addition to the flexibility this adds to the system, this simplifies the system considerably. These systems can implement advanced control strategies to optimally control the power stage under different conditions and also provide system-level intelligence.

A PSFB converter consists of four power electronic switches (like MOSFETs or IGBTs) that form a full-bridge on the primary side of the isolation transformer and diode rectifiers, or MOSFET switches for synchronous rectification (SR) on the secondary side. This topology allows all the switching devices to switch with zero voltage switching (ZVS), resulting in lower switching losses and an efficient converter. In this reference design, ZVS for switches in the one leg of the full bridge, and zero or low-voltage switching for switches in the other leg, is achieved.

For such an isolated topology, signal rectification is required on the secondary side. For systems with low output voltage or high output current ratings, implementing synchronous rectification instead of diode rectification achieves the best possible performance by avoiding diode rectification losses. In this design, current doubler synchronous rectification is implemented on the secondary side with different switching schemes to achieve optimum performance under varying load conditions.

A DC-DC converter system can be controlled in various modes, like voltage mode control (VMC), average current mode control (ACMC), or peak current mode control (PCMC). PCMC is a highly desired control scheme for power converters because of its inherent voltage feed forward, automatic cycle-by-cycle current limiting, flux balancing, and other advantages.

Implementing PCMC for a PSFB system requires complex PWM waveform generation with precise timing control. A new approach to this waveform generation is presented using TMS320F28004x (Texas Instruments Piccolo™ series) microcontrollers without requiring any additional support circuitry. Unique programmable on-chip slope compensation hardware is used to provide appropriate slope compensation that ensures open-loop stability and eliminates/limits subharmonic oscillations at the output. The delayed trip function in type-4 PWM helps implement the dead band with PCMC easily without occupying much CPU resources. This is explained in detail in this reference design guide. This design uses the same hardware ( TIDM-BIDIR-400-12) with some modification as described in the next chapters.