TIDUEZ9B July   2022  – April 2023

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Isolated Current Measurement
    2. 1.2 Band-Pass Filter
    3. 1.3 Analog-to-Digital Conversion
    4. 1.4 Arc Detection Algorithm
    5. 1.5 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Current Transformer Circuit
      2. 2.2.2 Analog Band-Pass Filter
      3. 2.2.3 Analog-to-Digital Conversion
      4. 2.2.4 Power Supply
      5. 2.2.5 Debugging and Status Indication Options
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS259474
      2. 2.3.2 TPS562202
      3. 2.3.3 TPS745
      4. 2.3.4 OPAx322
      5. 2.3.5 ADS8363
      6. 2.3.6 REF5025
      7. 2.3.7 TMDSCNCD280049C
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware and Software Requirements
      1. 3.1.1 Hardware
      2. 3.1.2 Software
        1. 3.1.2.1 Arc Detection Theory
        2. 3.1.2.2 Software Implementation
    2. 3.2 Test Setup
      1. 3.2.1 ControlCARD Configuration
      2. 3.2.2 Setup for Hardware and Software Validation
      3. 3.2.3 Setup for Arc Testing
    3. 3.3 Test Results
      1. 3.3.1 Test Results of Hardware and Software Validation
      2. 3.3.2 Testing With Arcs
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Support Resources
    4. 4.4 Trademarks
  10. 5About the Author
  11. 6Revision History

Analog Band-Pass Filter

The filter stage shown in Figure 2-3 consists of an OPA4322, 4-channel operational amplifier. U6A and U6B form a low-pass filter with a cutoff frequency at 100 kHz. U6C and U6D form a high-pass filter with a cutoff frequency of 30 kHz. In combination, this forms a band-pass filter with a pass band of 30 kHz to 100 kHz. The split topology of low-pass plus high-pass filters is selected to make it easy to adjust upper and lower levels of the band-pass filter separately.

GUID-20220711-SS0I-DPVW-L1KB-3DMBF0GW80WX-low.svg Figure 2-3 Schematic Filter Stage

The two most important specifications of an amplifier in an active filter application are Gain-Bandwidth-Product (GBW) and slew rate (SR).The minimum requirements for GBW and SR are given in Equation 1 and Equation 2.

Equation 1. G B W m i n =   100   ×   G ×   f c
Equation 2. S R m i n =   2   ×   π   ×   f c   × V P - P

where

  • G = closed-loop gain
  • fc= cutoff frequency of the low pass filter
  • VP-P= peak-to-peak output voltage

With the values of G = 1, fc = 100 kHz and VP-P = 5 V a minimum GBW of 10 MHz and a minimum slew rate of 3.14 V/μs are calculated. With a GBW of 20 MHz and a slew rate of 10 V/μs the OPA4322 fulfills these criteria and allows for some head room if a higher frequency band is desired. The transfer function of the filter is validated using the PSpice for TI simulation tool. The gain of the filter stage is plotted in Figure 2-4. The output of this filter is connected to the external ADC ADS8363 as well as to the internal ADC, via another amplifier which takes care of the voltage level translation from 5 V to 3.3 V for the C2000 MCU.

GUID-20220711-SS0I-TQLX-CC4C-LMPH0GJFQCS0-low.svg Figure 2-4 Simulated Magnitude of the Frequency Response of the Filter Stage