TIDUFK0 October   2026

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 Step-Down Converter Subsystem
      2. 2.2.2 Digital-to-Analog Control Set Path
      3. 2.2.3 High-Precision Measurement Front-End (Feedback Path)
    3. 2.3 Highlighted Products
      1. 2.3.1 TPSM8F7x20
      2. 2.3.2 ADS9308V8I
      3. 2.3.3 TMDSCNCD28P65X
      4. 2.3.4 DAC80504
      5. 2.3.5 REF50
      6. 2.3.6 OPAx990
  8. 3System Design Theory
    1. 3.1 Converter Step Down Range
    2. 3.2 Fault Clamping Protection
    3. 3.3 Current Clamping Behavior
  9. 4Hardware, Software, Testing Requirements, and Test Results
    1. 4.1 Hardware Requirements
    2. 4.2 Software
    3. 4.3 Test Setup
    4. 4.4 Test Results
      1. 4.4.1 Voltage Linearity test
      2. 4.4.2 Voltage Regulation Test
      3. 4.4.3 Current Linearity Test
      4. 4.4.4 Output Voltage Ripple
      5. 4.4.5 Full Load Transient Response
      6. 4.4.6 Sudden Load Switch In with Current Clamping Response
      7. 4.4.7 Full Load Voltage Settling Time
  10. 5Design and Documentation Support
    1. 5.1 Tools and Software
      1. 5.1.1 Tools
      2. 5.1.2 Software
    2. 5.2 Documentation Support
    3. 5.3 Support Resources
    4.     Trademarks
  11. 6About the Author

2.3.3 TMDSCNCD28P65X

TMDSCNCD28P65X is a low-cost evaluation and development board for TI C2000™ MCU series of F28P65x devices. TMDSCNCD28P65X comes with a HSEC180 (180-pin High speed edge connector) and, as a controlCARD, is ideal for initial evaluation and prototyping. For evaluation of TMDSCNCD28P65X, a 180-pin docking station TMDSHSECDOCK is required and can be purchased separately or as a bundled kit. In this design the control card is used for digital control loop settings.

The features of MCU include:

  • Contains up to three CPUs: two 32-bit C28x DSP CPUs and one CLA CPU, all running at 200MHz
  • 1.28MB of CPU-mappable flash (ECC-protected) with 5 flash banks
  • 248KB of RAM (enhanced parity-protected)
  • 36 pulse width modulator (PWM) channels, all with 150ps high-resolution capability (HRPWM)
  • Various digital power supply library enable simpler software implementation