NEW

ADC3421-Q1

ACTIVE

Automotive quad-channel 12-bit 25-MSPS analog-to-digital converter (ADC)

Top

Product details

Parameters

Sample rate (Max) (MSPS) 125 Resolution (Bits) 12 Number of input channels 4 Interface type Serial LVDS Analog input BW (MHz) 540 Features High Dynamic Range, High Performance, Low Power Rating Automotive Architecture Pipeline SNR (dB) 70.2 SFDR (dB) 87 Operating temperature range (C) -40 to 125 Input buffer Yes open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFNP (RWE) 56 64 mm² 8 x 8 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • AEC-Q100 Qualified for automotive applications
    • Temperature grade 1: –40°C to 125°C TA
  • Quad channel
  • 12-Bit resolution
  • Single supply: 1.8 V
  • Serial LVDS interface
  • Flexible input clock buffer with divide-by-1, -2, -4
  • SNR = 71.1 dBFS, SFDR = 90 dBc at
    fIN = 10 MHz
  • Ultra-low power consumption:
    • 44 mW/Ch at 25 MSPS
  • Channel isolation: 105 dB
  • Internal dither and chopper
  • Support for multichip synchronization

All trademarks are the property of their respective owners.

open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADC3421-Q1 is an automotive-grade, high-linearity, ultra-low power, quad-channel, 12-bit, 25-MSPS analog-to-digital converter (ADC). The device is designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider gives more flexibility for system clock architecture design, and the SYSREF input enables complete system synchronization. The ADC3421-Q1 supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

open-in-new Find other High-speed ADCs (>10MSPS)
Download

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet ADC3421-Q1 Automotive, Quad-Channel, 12-Bit, 25-MSPS Analog-to-Digital Converter datasheet (Rev. A) Mar. 25, 2020
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
User guide ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) Aug. 24, 2018
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
Description

The ADC3421 EVM demonstrates the performance of a low power quad 25Msps 12 bit ADC.  It includes the ADC3421 device and TI voltage regulators to provide the necessary voltages.  The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single (...)

Features
  • Single 1.8V supply simplify power requirements
  • Serial LVDS interface simplify digital interface and layout requirements
  • On chip Dither to improve SFDR
  • On chip Chopper to improve 1/f noise
  • Input clock buffer with 1/2/4 divider to simplify clocking
  • Pin compatibility between 12 and 14 bit versions
  • Supports (...)

Design tools & simulation

SIMULATION MODEL Download
SLAM226.ZIP (3 KB) - TINA-TI Spice Model
SIMULATION MODEL Download
SLAM227.TSC (1083 KB) - TINA-TI Reference Design
SIMULATION MODEL Download
SLAM228.ZIP (15 KB) - PSpice Model
SIMULATION MODEL Download
SLAM232.ZIP (36 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
VQFNP (RWE) 56 View options

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Related videos