ADC3423

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Quad-Channel, 12-Bit, 80-MSPS Analog-to-Digital Converter (ADC)

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Product details

Parameters

Sample rate (Max) (MSPS) 80 Resolution (Bits) 12 Number of input channels 4 Interface type Serial LVDS Analog input BW (MHz) 540 Features Low Power Rating Catalog Input range (Vp-p) 2 Power consumption (Typ) (mW) 288 Architecture Pipeline SNR (dB) 70.9 ENOB (Bits) 11.5 SFDR (dB) 93 Operating temperature range (C) -40 to 85 Input buffer No open-in-new Find other High-speed ADCs (>10MSPS)

Package | Pins | Size

VQFN (RTQ) 56 64 mm² 8 x 8 open-in-new Find other High-speed ADCs (>10MSPS)

Features

  • Quad Channel
  • 12-Bit Resolution
  • Single Supply: 1.8 V
  • Serial LVDS Interface
  • Flexible Input Clock Buffer with Divide-by-1, -2, -4
  • SNR = 70.2 dBFS, SFDR = 87 dBc at
    fIN = 70 MHz
  • Ultra-Low Power Consumption:
    • 98 mW/Ch at 125 MSPS
  • Channel Isolation: 105 dB
  • Internal Dither and Chopper
  • Support for Multi-Chip Synchronization
  • Pin-to-Pin Compatible with 14-Bit Version
  • Package: VQFN-56 (8 mm × 8 mm)
open-in-new Find other High-speed ADCs (>10MSPS)

Description

The ADC342x are a high-linearity, ultra-low power, quad-channel, 12-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC342x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

open-in-new Find other High-speed ADCs (>10MSPS)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet ADC342x Quad-Channel, 12-Bit, 25-MSPS to 125-MSPS, Analog-to-Digital Converter datasheet (Rev. A) Sep. 30, 2015
Technical articles Keys to quick success using high-speed data converters Oct. 13, 2020
Technical articles How to achieve fast frequency hopping Mar. 03, 2019
User guides ADC3xxxEVM and ADC3xJxxEVM User's Guide (Rev. D) Aug. 24, 2018
Technical articles RF sampling: Learning more about latency Feb. 09, 2017
Technical articles Why phase noise matters in RF sampling converters Nov. 28, 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
Description

The ADC3423 EVM demonstrates the performance of a low power quad 80Msps 12 bit ADC.  It includes the ADC3423 device and TI voltage regulators to provide the necessary voltages.  The input for the ADC is by default connected to the transformer input which can be connected to a 50 ohm single (...)

Features
  • Single 1.8V supply simplify power requirements
  • Serial LVDS interface simplify digital interface and layout requirements
  • On chip Dither to improve SFDR
  • On chip Chopper to improve 1/f noise
  • Input clock buffer with 1/2/4 divider to simplify clocking
  • Pin compatibility between 12 and 14 bit versions
  • Supports (...)

Design tools & simulation

SIMULATION MODELS Download
SLAM226.ZIP (3 KB) - TINA-TI Spice Model
SIMULATION MODELS Download
SLAM227.TSC (1083 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SLAM228.ZIP (15 KB) - PSpice Model
SIMULATION MODELS Download
SLAM232.ZIP (36 KB) - IBIS Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

CAD/CAE symbols

Package Pins Download
QFN (RTQ) 56 View options

Ordering & quality

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