ADS125P08
16-channel, 24-bit 1MSPS delta-sigma ADC with integrated channel auto-sequencer and FIFO buffer
ADS125P08
- Programmable data rate up to 1.067MSPS
- Analog multiplexer with 17 independently selectable inputs:
- Up to 8 fully differential inputs
- Up to 16 single ended inputs
- Rail-to-rail analog input buffer and reference buffer
- Internal voltage reference, selectable output 2.5V or 4.096V
- Fault detection and monitor circuits
- General-Purpose I/Os
- Internal Oscillator: 25.6MHz, 1% Accuracy
- Channel auto-sequencer and FIFO buffer
- Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
- Power-scalable architecture with four speed modes
The ADS125P08 is a multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. The device offers an excellent combination of ac performance and dc precision with low power consumption.
The device integrates high-impedance input and reference buffers to reduce signal loading. The ADS125P08 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.
Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.
The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.
Technical documentation
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | ADS125P08 8/16-Channel, 1MSPS , 24 -Bit, Delta-Sigma ADC datasheet | PDF | HTML | 18 Dec 2025 |
| Circuit design | 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) | PDF | HTML | 19 Sep 2024 | |
| Application note | Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) | PDF | HTML | 18 Mar 2024 | |
| Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 29 Mar 2023 | |
| E-book | Fundamentals of Precision ADC Noise Analysis (Rev. A) | 19 Jun 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
ADS125P08EVM-PDK — ADS125P08 evaluation module
The ADS125P08 evaluation module (EVM) is a platform for evaluating the performance of the ADS125P08, which is a 24-bit, 16-channel, 1- MSPS, multiplexed delta-sigma (ΔΣ) analog-to-digital converter (ADC) designed for low-latency, high- precision data acquisition systems. The ADS125P08 integrates a (...)
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Supported products & hardware
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
TINA-TI — SPICE-based analog simulation program
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RHB) | 36 | Ultra Librarian |
Ordering & quality
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