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|*||Data sheet||ADS42JBx9 Dual-Channel, 14- and 16-Bit, 250-MSPS Analog-to-Digital Converters datasheet (Rev. F)||PDF | HTML||22 Dec 2014|
|EVM User's guide||ADS42JB46, ADS42JB49, and ADS42JB69 Evaluation Module User's Guide (Rev. D)||08 Feb 2017|
|Application note||Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai||02 May 2016|
|User guide||TSW14J56 JESD204B High-Speed Data Capture/ Pattern Generator Card User's Guide (Rev. C)||PDF | HTML||11 Jan 2016|
|Application note||Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)||22 May 2015|
|White paper||Ready to make the jump to JESD204B? White Paper (Rev. B)||19 Mar 2015|
|User guide||Interoperability of TI ADS42JB69 Family of JESD204B ADCs with Altera FPGAs||04 Oct 2013|
|Application note||Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)||19 Jul 2013|
|Application note||LMK04828 as a Clock Source for the ADS42JB69||14 Nov 2012|
For additional terms or required resources, click any title below to view the detail page where available.
|VQFN (RGC)||64||View options|
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