Product details

Resolution (Bits) 16 Number of input channels 6 Sample rate (Max) (kSPS) 250 Interface type Byte-Wide, Parallel Architecture SAR Input type Pseudo-Differential Multi-channel configuration Simultaneous Sampling Rating Catalog Reference mode Ext, Int Input range (Max) (V) 2.6 Input range (Min) (V) 0 Features Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 190 Analog voltage AVDD (Min) (V) 4.75 SNR (dB) 88 Analog voltage AVDD (Max) (V) 5.25 INL (Max) (+/-LSB) 4 Digital supply (Min) (V) 2.7 Digital supply (Max) (V) 5.5
Resolution (Bits) 16 Number of input channels 6 Sample rate (Max) (kSPS) 250 Interface type Byte-Wide, Parallel Architecture SAR Input type Pseudo-Differential Multi-channel configuration Simultaneous Sampling Rating Catalog Reference mode Ext, Int Input range (Max) (V) 2.6 Input range (Min) (V) 0 Features Operating temperature range (C) -40 to 85 Power consumption (Typ) (mW) 190 Analog voltage AVDD (Min) (V) 4.75 SNR (dB) 88 Analog voltage AVDD (Max) (V) 5.25 INL (Max) (+/-LSB) 4 Digital supply (Min) (V) 2.7 Digital supply (Max) (V) 5.5
TQFP (PAG) 64 144 mm² 12 x 12
  • Six Input Channels
  • Fully Differential Inputs
  • Six Independent 16-Bit ADCs
  • 4µs Total Throughput per Channel
  • Low Power:
    200mW in Normal Mode
    5mW in Nap Mode
    50µW in Power-Down Mode
  • TQFP-64 Package Package
  • APPLICATIONS
    • Motor Control
    • Multi-Axis Positioning Systems
    • 3-Phase Power Control

All trademarks are the property of their respective owners.

  • Six Input Channels
  • Fully Differential Inputs
  • Six Independent 16-Bit ADCs
  • 4µs Total Throughput per Channel
  • Low Power:
    200mW in Normal Mode
    5mW in Nap Mode
    50µW in Power-Down Mode
  • TQFP-64 Package Package
  • APPLICATIONS
    • Motor Control
    • Multi-Axis Positioning Systems
    • 3-Phase Power Control

All trademarks are the property of their respective owners.

The ADS8365 includes six, 16-bit, 250kSPS analog-to-digital converters (ADCs) with six fully differential input channels grouped into three pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This architecture provides excellent common-mode rejection of 80dB at 50kHz, which is important in high-noise environments.

The ADS8365 offers a flexible, high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.

The ADS8365 includes six, 16-bit, 250kSPS analog-to-digital converters (ADCs) with six fully differential input channels grouped into three pairs for high-speed simultaneous signal acquisition. Inputs to the sample-and-hold amplifiers are fully differential and are maintained differential to the input of the ADC. This architecture provides excellent common-mode rejection of 80dB at 50kHz, which is important in high-noise environments.

The ADS8365 offers a flexible, high-speed parallel interface with a direct address mode, a cycle, and a FIFO mode. The output data for each channel is available as a 16-bit word.

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Technical documentation

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Type Title Date
* Data sheet 16-Bit, 250kSPS 6-Channel Simultaneous Sampling SAR Analog-to-Digital Converters datasheet (Rev. C) 27 Mar 2008
White paper Voltage-reference impact on total harmonic distortion 01 Aug 2016
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 21 May 2015
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 17 Mar 2011
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 10 Nov 2010
More literature ADS8365EVM Readme Page Thank You Letter (Rev. A) 05 Dec 2006
EVM User's guide ADS8364/65M EVM User's Guide 07 Sep 2006

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

ADS8365M-EVM — ADS8365M Evaluation Module

The ADS8365M-EVM is designed for the prototyping and evaluation of the ADS8365 analog-to-digital converter (ADC). This high-resolution, 16 bit, parallel analog-to-digital, 250 kHz, SAR device, can be configured as a single or fully differential, pseudo-bipolar input. The EVM uses a (...)

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Simulation model

ADS8365 IBIS Model

SBAM147.ZIP (51 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Calculation tool

ADC-INPUT-CALC — Analog-to-digital converter (ADC) input driver design tool supporting multiple input types

ADC-INPUT-CALC is an online tool that provides support for designing the input buffer to an analog-to-digital converter (ADC). It offers 24 different op-amp based buffer circuits that can be used to drive an ADC input. The available topologies cover differential, single-ended and (...)
Calculation tool

ANALOG-ENGINEER-CALC — Analog engineer's calculator

The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
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Calculation tool

JITTER-SNR-CALC — Jitter and SNR Calculator for ADCs

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
Design tool

ADC-TO-VREF-SELECT — ADC to series voltage reference selection tool

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired input voltage, and the tool will list the top three voltage reference recommendations. There is also an option to use (...)
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TQFP (PAG) 64 View options

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