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Product details

Parameters

Architecture Fixed Gain/Buffer Number of channels (#) 1 Total supply voltage (Min) (+5V=5, +/-5V=10) 2.8 Total supply voltage (Max) (+5V=5, +/-5V=10) 12.6 GBW (Typ) (MHz) 1000 BW @ Acl (MHz) 1000 Acl, min spec gain (V/V) 1 Slew rate (Typ) (V/us) 8000 Vn at flatband (Typ) (nV/rtHz) 4.8 Vn at 1 kHz (Typ) (nV/rtHz) 5.9 Iq per channel (Typ) (mA) 5.8 Vos (offset voltage @ 25 C) (Max) (mV) 30 Rail-to-rail No Rating Catalog Operating temperature range (C) -45 to 85 Input bias current (Max) (pA) 7000000 Offset drift (Typ) (uV/C) 125 Output current (Typ) (mA) 60 2nd harmonic (dBc) 76 3rd harmonic (dBc) 98 @ MHz 5 open-in-new Find other High-speed op amps (GBW>=50MHz)

Package | Pins | Size

SOIC (D) 8 19 mm² 3.91 x 4.9 SOT-23 (DBV) 5 5 mm² 2.9 x 1.6 open-in-new Find other High-speed op amps (GBW>=50MHz)

Features

  • Wide Bandwidth: 1000MHz
  • High Slew Rate: 8000V/µs
  • Flexible Supply Range:
    ±1.4V to ±6.3V Dual Supplies
    +2.8V to +12.6V Single Supply
  • Output Current: 60mA (continuous)
  • Peak Output Current: 350mA
  • Low Quiescent Current: 5.8mA
  • Standard Buffer Pinout
  • Optional Mid-Supply Reference Buffer
  • APPLICATIONS
    • Low Impedance Reference Buffers
    • Clock Distribution Circuits
    • Video/Broadcast Equipment
    • Communications Equipment
    • High-Speed Data Acquisition
    • Test Equipment and Instrumentation

All other trademarks are the property of their respective owners.

open-in-new Find other High-speed op amps (GBW>=50MHz)

Description

The BUF602 is a closed-loop buffer recommended for a wide range of applications. Its wide bandwidth (1000MHz) and high slew rate (8000V/µs) make it ideal for buffering very high-frequency signals. For AC-coupled applications, an optional mid-point reference (VREF) is provided, reducing the number of external components required and the necessary supply current to provide that reference.

The BUF602 is available in a standard SO-8 surface-mount package and in an SOT23-5 where a smaller footprint is needed.

open-in-new Find other High-speed op amps (GBW>=50MHz)
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 9
Type Title Date
* Datasheet High-Speed, Closed-Loop Buffer datasheet (Rev. B) May 22, 2008
Technical articles How to reduce distortion in high-voltage, high-frequency signal generation for AWGs Oct. 30, 2018
Technical articles What are the advantages of using JFET-input amplifiers in high-speed applications? Jun. 18, 2018
Technical articles Unique active mux capability combines buffer and switch into one solution Oct. 10, 2017
White papers The Signal e-book: A compendium of blog posts on op amp design topics Mar. 28, 2017
Technical articles How to minimize filter loss when you drive an ADC Oct. 20, 2016
User guides DEM-BUF-SO-1A Demonstration Fixture (Rev. B) Apr. 12, 2012
User guides DEM-BUF-SOT-1A User's Guide (Rev. A) Apr. 22, 2011
User guides DEM-BUF-SO-1A Demonstration Fixture (Rev. A) Mar. 28, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
DEM-BUF-SO-1A
DEM-BUF-SO-1A
document-generic User guide
5
Description

<p>The <b>DEM-BUF-SO-1A</b> demonstration fixture helps designers evaluate the operation and performance of TI's high speed, closed-loop buffers. This unpopulated PC board is compatible with products offered in the 8-lead SOIC (D) package.</p>

<p>For more information on this type of buffer (...)

Features
  • Unpopulated Circuit Board
  • User's Guide
EVALUATION BOARDS Download
DEM-BUF-SOT-1A
DEM-BUF-SOT-1A
document-generic User guide
5
Features
  • Free
  • Unpopulated Circuit Board

Design tools & simulation

SIMULATION MODELS Download
SBOJ002A.ZIP (2 KB) - PSpice Model
SIMULATION MODELS Download
SBOMA37.TSC (2972 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SBOMA38.ZIP (6 KB) - TINA-TI Spice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
SIMULATION TOOLS Download
SPICE-based analog simulation program
TINA-TI TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
document-generic User guide
CALCULATION TOOLS Download
Analog engineer's calculator
ANALOG-ENGINEER-CALC — The Analog Engineer’s Calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting op-amp gain with feedback (...)
Features
  • Expedites circuit design with analog-to-digital converters (ADCs) and digital-to-analog converters (DACs)
    • Noise calculations
    • Common unit translation
  • Solves common amplifier circuit design problems
    • Gain selections using standard resistors
    • Filter configurations
    • Total noise for common amplifier configurations
  • (...)
CALCULATION TOOLS Download
Voltage Divider Determines A Set of Resistors for a Voltage Divider
VOLT-DIVIDER-CALC VOLT-DIVIDER-CALC quickly determines a set of resistors for a voltage divider. This KnowledgeBase Javascript utility can be used to find a set of resistors for a voltage divider to achieve the desired output voltage. This calculator can also be used to design non-inverting attentuation circuits.

(...)

CAD/CAE symbols

Package Pins Download
SOIC (D) 8 View options
SOT-23 (DBV) 5 View options

Ordering & quality

Support & training

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