CD4072B

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CMOS Dual 4-Input OR Gate

Data sheet

CD4071B, CD4072B, CD4075B TYPES datasheet (Rev. D)

Product details

Parameters

Technology Family

CD4000

VCC (Min) (V)

3

VCC (Max) (V)

18

Channels (#)

2

Inputs per channel

4

IOL (Max) (mA)

6.8

IOH (Max) (mA)

-6.8

Input type

Standard CMOS

Output type

Push-Pull

Features

Standard Speed (tpd > 50ns)

Data rate (Max) (Mbps)

8

Rating

Catalog

Operating temperature range (C)

-55 to 125

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Package | Pins | Size

PDIP (N)

14

181 mm² 19.3 x 9.4

SOIC (D)

14

52 mm² 8.65 x 6

SOP (NS)

14

80 mm² 10.2 x 7.8

TSSOP (PW)

14

32 mm² 5 x 6.4

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Features

Medium-Speed Operation - t_PLH, t_PHL = 60 ns (typ.) at V_DD = 10 V
100% tested for quiescent current at 20 V
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Standardized, symmetrical output characteristics
Noise margin (full package-temperature range):
     1 V at V_DD = 5 V
     2 V at V_DD = 10 V
  2.5 V at V_DD = 15 V
5-V, 10-V, and 15-V parametric ratings
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

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Description

CD4071B, CD4072B and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates.

The CD4071B, CD4072B, and CD4075B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes) and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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Technical documentation

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	Type	Title	Date
*	Datasheet	CD4071B, CD4072B, CD4075B TYPES datasheet (Rev. D)	Aug. 21, 2003
	Technical articles	How to keep your motor running safely	Jun. 04, 2020
	Selection guides	Logic Guide (Rev. AB)	Jun. 12, 2017
	Application notes	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	Dec. 02, 2015
	User guides	LOGIC Pocket Data Book (Rev. B)	Jan. 16, 2007
	Application notes	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	Jul. 08, 2004
	User guides	Signal Switch Data Book (Rev. A)	Nov. 14, 2003
	More literature	Logic Cross-Reference (Rev. A)	Oct. 07, 2003
	Application notes	Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics	Dec. 03, 2001