CD74HC03 High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain | TI.com

CD74HC03 (ACTIVE)

High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain

High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain - CD74HC03
Datasheet
 

Description

The ’HC03 and ’HCT03 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 LSTTL loads. The HCT logic family is functionally as well as pin compatible with the standard LS logic family.

These open drain NAND gates can drive into resistive loads to output voltages as high as 10V. Minimum values of RL required versus load voltage are shown in Figure 2.

Features

  • Buffered Inputs
  • Typical Propagation Delay: 8ns at VCC = 5V, CL = 15pF, TA = 25°C
  • Output Pull-up to 10V
  • Fanout (Over Temperature Range)
    • Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    • Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
  • Wide Operating Temperature Range . . . –55°C to 125°C
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types
    • 2V to 6V Operation
    • High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
  • HCT Types
    • 4.5V to 5.5V Operation
    • Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
    • CMOS Input Compatibility, Il 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor

Parametrics

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Part number Order Technology Family VCC (Min) (V) VCC (Max) (V) Channels (#) Inputs per channel IOL (Max) (mA) IOH (Max) (mA) Input type Output type Features Rating Data rate (Max) (Mbps) Operating temperature range (C) Package Group Package size: mm2:W x L (PKG)
CD74HC03 Order now HC     2     6     4     2     5.2     0     Standard CMOS     Open-Drain     High Speed (tpd 10-50ns)     Catalog     28     -55 to 125     PDIP | 14
SOIC | 14    
See datasheet (PDIP)
14SOIC: 52 mm2: 6 x 8.65 (SOIC | 14)    
CD54HC03 Samples not available HC     2     6         0     -5.2     Standard CMOS     Push-Pull       Military       -55 to 125     CDIP | 14     See datasheet (CDIP)