The HC367, HCT367, HC368, and CD74HCT368 silicon gate CMOS three-state buffers are general purpose high-speed non-inverting and inverting buffers. They have high drive current outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds comparable to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs.
The HC367 and HCT367 are non-inverting buffers, whereas the HC368 and CD74HCT368 are inverting buffers. These devices have two output enables, one enable (OE1) controls 4 gates and the other (OE2) controls the remaining 2 gates.
The HCT367 and CD74HCT368 logic families are speed, function and pin compatible with the standard LS logic family.
Data sheet acquired from Harris Semiconductor
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Channels (#)||IOL (Max) (mA)||IOH (Max) (mA)||ICC (uA)||Input type||Output type||Features||Data rate (Mbps)||Rating||Package Group|
High speed (tpd 10-50ns)
Input clamp diode
PDIP | 16
SOIC | 16
|CD54HCT367||Samples not available||HCT||4.5||5.5||6||6||-6||80||Standard CMOS||Push-Pull||Standard speed (tpd > 50ns)||50||Military||CDIP | 16|