TI E2E™ forums with technical support from TI engineers
|*||Data sheet||CDCEx937-Q1 Programmable 3-PLL VCXO Clock Synthesizer With 1.8-V, 2.5-V, and 3.3-V LVCMOS Outputs datasheet (Rev. C)||PDF | HTML||16 Dec 2016|
|Technical article||How to select an optimal clocking solution for your FPGA-based design||09 Dec 2015|
|Technical article||Clocking sampled systems to minimize jitter||31 Jul 2014|
|Application note||Crystal or Crystal Oscillator Replacement with Silicon Devices||18 Jun 2014|
|Technical article||Timing is Everything: How to optimize clock distribution in PCIe applications||28 Mar 2014|
|Application note||VCXO Application Guideline for CDCE(L)9xx Family (Rev. A)||23 Apr 2012|
|User guide||CDCE(L)9XX & CDCEx06 Programming Evaluation Module Manual (Rev. A)||22 Nov 2010|
|Application note||General I2C / EEPROM usage for the CDCE(L)9xx family||26 Jan 2010|
|Application note||Troubleshooting I2C Bus Protocol||19 Oct 2009|
|Application note||Usage of I2C for CDCE(L)949, CDCE(L)937, CDCE(L)925, CDCE(L)913||23 Sep 2009|
|Application note||Generating Low Phase-Noise Clocks for Audio Data Converters from Low Frequency||31 Mar 2008|
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