All other trademarks are the property of their respective owners
The CDCE925 and CDCEL925 are modular PLL-based low-cost, high-performance, programmable clock synthesizers, multipliers, and dividers. They generate up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230 MHz, using up to two independent configurable PLLs.
The CDCEx925 has a separate output supply pin, VDDOUT, which is 1.8 V for CDCEL925 and 2.5 V to 3.3 V for CDCE925.
The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20 pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal.
The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS), or interface (USB, IEEE1394, memory stick) clocks from a 27-MHz reference input frequency, for example.
All PLLs support SSC (spread-spectrum clocking). SSC can be center-spread or down-spread clocking, which is a common technique to reduce electromagnetic interference (EMI).
Based on the PLL frequency and the divider settings, the internal loop filter components are automatically adjusted to achieve high stability and optimized jitter transfer characteristic of each PLL.
The device supports nonvolatile EEPROM programming for easy customization of the device in the application. It is preset to a factory default configuration and can be reprogrammed to a different application configuration before it goes onto the PCB or reprogrammed by in-system programming. All device settings are programmable through the SDA/SCL bus, a 2-wire serial interface.
Three, free programmable control inputs, S0, S1, and S2, can be used to select different frequencies, or change the SSC setting for lowering EMI, or other control features like outputs disable to low, outputs in high-impedance state, power down, PLL bypass, and so forth.
The CDCx925 operates in a 1.8-V environment and in a temperature range of –40°C to 85°C.
For additional terms or required resources, click any title below to view the detail page where available.
The CDCE925Perf-Evaluation Module allows the verification of the functionality and performance of CDCE925 and CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables.
The CDCEl925PERF-Evaluation Module will help to verify the functionality and performance of CDCEL925 with the options of crystal and 1.8 V LVCMOS inputs. The outputs can be connected to the Oscilloscope directly with SMA cables. The below information/items can be included: The EVM use's guide: (...)
The clock generator CDCE(L)949 family has integrated EEPROM that allows the default frequency settings to be saved upon start up. CDCEL9XXPROGEVM is a programming board that allows a fast programming of prototyping samples or small production quantities. It applies to all 8 devices in the family: (...)
The J6Entry/RSP EVM is an evaluation platform designed to speed up development efforts and reduce time to market for applications such as Infotainment, reconfigurable Digital Cluster or Integrated Digital Cockpit.
The main CPU board integrates these key peripherals such as Ethernet or HDMI, while (...)
It is intended to be used with the evaluation modules of the above devices.
| Package | Pins | Download |
|---|---|---|
| TSSOP (PW) | 16 | View options |
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.