Product details

Resolution (Bits) 10 Number of DAC channels (#) 1 Interface type Parallel CMOS Sample/update rate (MSPS) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (Typ) (mW) 170 SFDR (dB) 76 Architecture Current Source Operating temperature range (C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 10 Number of DAC channels (#) 1 Interface type Parallel CMOS Sample/update rate (MSPS) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (Typ) (mW) 170 SFDR (dB) 76 Architecture Current Source Operating temperature range (C) -40 to 85 Reference type Ext, Int
SOIC (DW) 28 184 mm² 17.9 x 10.3 TSSOP (PW) 28 62 mm² 9.7 x 6.4
  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 68dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC900 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.

The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC) offering a 10-bit resolution option within the SpeedPlus family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC902, and DAC904 provide a component selection option to an 8-, 12-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance,and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC900 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC900 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC900.

The reference structure of the DAC900 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.

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Technical documentation

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Type Title Date
* Data sheet DAC900 10-Bit 165-MSPS Digital-to-Analog Converter datasheet (Rev. B) 29 May 2002
EVM User's guide DAC90x Evaluation Module User's Guide 08 Aug 2017
Application note Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) 08 May 2015
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 23 Oct 2012
User guide DEM-DAC90x: Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908 27 Sep 2000

Design & development

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Evaluation board

DAC900EVM — DAC900 10-Bit 165-MSPS Digital-to-Analog Converter (DAC) Evaluation Module

The DAC900 evaluation module (EVM) is designed to evaluate the 10-bit, high-speed,
CMOS-interface DAC900. The EVM provides simple and minimal external components to minimize system cost and power consumption.
Not available on TI.com
Simulation model

DAC900 IBIS Model for 3.3V DAC900 IBIS Model for 3.3V

Simulation model

DAC900 IBIS Model for 5V DAC900 IBIS Model for 5V

Simulation tool

PSPICE-FOR-TI PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Calculation tool

MATCHGAIN-CALC Wideband Comp Current Output DAC to SE Interface: Impr Matching for Gain & Compliance Volt Swing

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  • Open the ZIP file to extract the calculator tool.
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High-speed digital-to-analog converters (DACs) most often use a (...)

Gerber file

DAC900 Design File DAC900 Design File

Package Pins Download
SOIC (DW) 28 View options
TSSOP (PW) 28 View options

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