DS90CF364

ACTIVE

+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz

Product details

Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link LVDS Function Deserializer Output compatibility LVCMOS Color depth (bpp) 18 Features Low-EMI Point-to-Point Communication EMI reduction LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Applications In-vehicle Infotainment (IVI) Input compatibility FPD-Link LVDS Function Deserializer Output compatibility LVCMOS Color depth (bpp) 18 Features Low-EMI Point-to-Point Communication EMI reduction LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm² (12.5 mm × 8.1 mm)
  • 20 to 65 MHz shift clock support
  • Programmable Transmitter (DS90C363) strobe select (Rising or Falling edge strobe)
  • Single 3.3V supply
  • Chipset (TX + RX) power consumption < 250 mW (typ)
  • Power-down mode (< 0.5 mW total)
  • Single pixel per clock XGA (1024×768) ready
  • Supports VGA, SVGA, XGA and higher addressability
  • Up to 170 Megabyte/sec bandwidth
  • Up to 1.3 Gbps throughput
  • Narrow bus reduces cable size and cost
  • 290 mV swing LVDS devices for low EMI
  • PLL requires no external components
  • Low profile 48-lead TSSOP package
  • Falling edge data strobe Receiver
  • Compatible with TIA/EIA-644 LVDS standard
  • ESD rating > 7 kV
  • Operating Temperature: −40°C to +85°C

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments. TRI-STATE is a trademark of Texas Instruments.

  • 20 to 65 MHz shift clock support
  • Programmable Transmitter (DS90C363) strobe select (Rising or Falling edge strobe)
  • Single 3.3V supply
  • Chipset (TX + RX) power consumption < 250 mW (typ)
  • Power-down mode (< 0.5 mW total)
  • Single pixel per clock XGA (1024×768) ready
  • Supports VGA, SVGA, XGA and higher addressability
  • Up to 170 Megabyte/sec bandwidth
  • Up to 1.3 Gbps throughput
  • Narrow bus reduces cable size and cost
  • 290 mV swing LVDS devices for low EMI
  • PLL requires no external components
  • Low profile 48-lead TSSOP package
  • Falling edge data strobe Receiver
  • Compatible with TIA/EIA-644 LVDS standard
  • ESD rating > 7 kV
  • Operating Temperature: −40°C to +85°C

All trademarks are the property of their respective owners. TRI-STATE is a trademark of Texas Instruments. TRI-STATE is a trademark of Texas Instruments.

The DS90C363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CF364 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 65 MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 170 Mbyte/sec. The Transmitter is offered with programmable edge data strobes for convenient interface with a variety of graphics controllers. The Transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge Transmitter will inter-operate with a Falling edge Receiver (DS90CF364) without any translation logic.

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

The DS90C363 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CF364 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 65 MHz, 18 bits of RGB data and 3 bits of LCD timing and control data (FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per LVDS data channel. Using a 65 MHz clock, the data throughput is 170 Mbyte/sec. The Transmitter is offered with programmable edge data strobes for convenient interface with a variety of graphics controllers. The Transmitter can be programmed for Rising edge strobe or Falling edge strobe through a dedicated pin. A Rising edge Transmitter will inter-operate with a Falling edge Receiver (DS90CF364) without any translation logic.

This chipset is an ideal means to solve EMI and cable size problems associated with wide, high speed TTL interfaces.

Download View video with transcript Video

Technical documentation

No results found. Please clear your search and try again.
View all 8
Top documentation Type Title Format options Date
* Data sheet DS90C363/F364 3.3V Prog LVDS Trnsmit 18Bit FPD 65MHz/LVDS Rcvr 18Bit FPD 85MHz datasheet (Rev. C) Apr 12, 2013
Application note High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs Nov 9, 2018
Application note How to Map RGB Signals to LVDS/OpenLDI(OLDI) Displays (Rev. A) Jun 29, 2018
Application note AN-1032 An Introduction to FPD-Link (Rev. C) Aug 8, 2017
Application note Receiver Skew Margin for Channel Link I and FPD Link I Devices PDF | HTML Jan 13, 2016
Application note TFT Data Mapping for Dual Pixel LDI Application - Alternate A - Color Map May 15, 2004
Application note AN-1056 STN Application Using FPD-Link May 14, 2004
Application note AN-1085 FPD-Link PCB and Interconnect Design-In Guidelines May 14, 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

FLINK3V8BT-85 — Evaluation kit for FPD-Link family of serializer and deserializer LVDS devices

The FPD-Link evaluation kit includes a transmitter (Tx) board, a receiver (Rx) board and interfacing cables. This kit shows the chipsets interfacing from test equipment or a graphics controller using low-voltage differential signaling (LVDS) to a receiver board.

The transmitter board accepts (...)

Supported products & hardware
In stock
Limit:
??asset.out-of-stock-ti_en_US??
Not available
Package Pins CAD symbols, footprints & 3D models
TSSOP (DGG) 48 Ultra Librarian

Ordering & quality

Recommended products may have parameters, evaluation modules or reference designs related to this TI product.

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos