The ISO7221 is a dual-channel digital isolator. To facilitate PCB layout, the channels
are oriented in the opposite directions. This device has a logic input and output buffer separated
by TIs silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device blocks high voltage, isolates grounds, and prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.
The small capacitance and resulting time constant provide fast operation with signaling
rates available from 0 Mbps (dc) to 150 Mbps(3). The A-, B- and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay.
This device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs
are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.
The ISO7221 is characterized for operation over the ambient temperature range of 55°C to 175°C.
The ISO7221 is a dual-channel digital isolator. To facilitate PCB layout, the channels
are oriented in the opposite directions. This device has a logic input and output buffer separated
by TIs silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to 4000 V. Used in conjunction with isolated power supplies, this device blocks high voltage, isolates grounds, and prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry.
A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received every 4 µs, the input is assumed to be unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.
The small capacitance and resulting time constant provide fast operation with signaling
rates available from 0 Mbps (dc) to 150 Mbps(3). The A-, B- and C-option devices have TTL input thresholds and a noise filter at the input that prevents transient pulses from being passed to the output of the device. The M-option devices have CMOS VCC/2 input thresholds and do not have the input noise-filter and the additional propagation delay.
This device requires two supply voltages of 3.3 V, 5 V, or any combination. All inputs
are 5-V tolerant when supplied from a 3.3-V supply and all outputs are 4-mA CMOS.
The ISO7221 is characterized for operation over the ambient temperature range of 55°C to 175°C.