LM98640QML-SP

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Product details

Resolution (Bits) 14 Number of channels (#) 2 Samples/sec (MSPS) 40 Supply voltage (Max) 3.3 Operating temperature range (C) -55 to 125, 25 to 25 Output data format LVDS
Resolution (Bits) 14 Number of channels (#) 2 Samples/sec (MSPS) 40 Supply voltage (Max) 3.3 Operating temperature range (C) -55 to 125, 25 to 25 Output data format LVDS
CFP (NBB) 68
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C
  • Radiation Hardened
    • TID 100 krad(Si)
    • Single Event Latch-Up (SEL) Immune to LET = 120 MeV-cm2/mg
    • Single Event Functional Interrupt (SEFI) Free to 120 MeV-cm2/mg
    • SMD 5962R1820301VXC
  • ADC Resolution: 14-Bit
  • ADC Sampling Rate: 5 MSPS to 40 MSPS
  • Input Level: 2.85 V
  • Supply Voltages 3.3 V and 1.8 V (Nominal)
    • 125 mW per Channel at 15 MSPS
    • 178 mW per Channel at 40 MSPS
  • CDS or S/H Processing for CCD or CIS Sensors
    • CDS or S/H Gain 0 dB or 6 dB
  • Programmable Analog Gain for Each Channel
    • 256 Steps; Range –3 dB to 18 dB
  • Programmable Analog Offset Correction
    • Fine and Coarse DAC Resolution ±8 Bits
    • Fine DAC Range ±5 mV
    • Coarse DAC Range ±250 mV
  • Programmable Input Clamp Voltage
  • Programmable Sample Edge: 1/64th Pixel Period
  • INL at 15 MHz: ±3.5 LSB
  • Noise Floor: –79 dB
  • Crosstalk: –80 dB
  • Operating Temp: –55°C to 125°C

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

The LM98640QML-SP is a fully integrated, high performance 14-Bit, 5-MSPS to 40-MSPS signal processing solution. The Serial LVDS output format performs well during single event exposure, preventing data loss. The LM98640QML-SP has an adaptive power scaling feature to optimize power consumption based on the operating frequency and amount of gain required. High-speed signal throughput is achieved with an innovative architecture utilizing Correlated Double Sampling (CDS), typically employed with CCD arrays, or Sample and Hold (S/H) inputs (for CIS and CMOS image sensors). The sampling edges are programmable to a resolution of 1/64th of a pixel period. Both the CDS and S/H have a programmable gain of either 0 dB or 6 dB. The signal paths utilize two ±8-bit offset correction DACs for coarse and fine offset correction, and 8-bit Programmable Gain Amplifiers (PGA) that can be programmed independently for each input. The signals are then routed to two on chip 14-bit 40-MHz high performance analog-to-digital converters (ADC). The fully differential processing channel provides exceptional noise immunity, having a very low noise floor of –79 dB at 1x gain.

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Technical documentation

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Type Title Date
* Data sheet LM98640QML-SP Radiation Hardness Assured (RHA), Dual Channel, 14-Bit, 40-MSPS Analog Front End With LVDS Output datasheet (Rev. G) 28 Nov 2018
* SMD LM98640QML-SP SMD 5962-18203 22 Sep 2020
* Radiation & reliability report LM98640QML SEE Report 14 May 2012
* Radiation & reliability report LM98640W-MLS SEE Report 14 May 2012
* Radiation & reliability report LM98640W-MLS TID Report 14 May 2012
Selection guide TI Space Products (Rev. I) 03 Mar 2022
Application note Heavy Ion Orbital Environment Single-Event Effects Estimations 18 May 2020
Application note Single-Event Effects Confidence Interval Calculations 14 Jan 2020
More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing 17 Jun 2019
E-book Radiation Handbook for Electronics (Rev. A) 21 May 2019
Application note CCD and CMOS Imagers in Space: Signal Processing Challenges and Solutions 05 Nov 2018
EVM User's guide LM98640CVAL Evaluation Board User’s Guide 25 Jan 2012

Design & development

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Evaluation board

LM98640CVAL — Dual Channel, 14-Bit, 40 MSPS Analog Front End with LVDS Output

The LM98640CVAL Board is designed to allow quick evaluation and design development of TI's LM98640QML Analog Front End. This development board is designed to function in several different configurations.

The primary configuration connects the LM98640QML evaluation board to TI's Wavevision 5 Data (...)

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PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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