Ultra-low jitter LVCMOS fanout buffer/level translator with universal input and 5 outputs


Product details


Function Single-ended Additive RMS jitter (Typ) (fs) 30 Output frequency (Max) (MHz) 200 Number of outputs 5 Output supply voltage (V) 3.3, 2.5, 1.8, 1.5 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 25 Features Pin control Operating temperature range (C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS open-in-new Find other Clock buffers

Package | Pins | Size

WQFN (RTW) 24 16 mm² 4 x 4 open-in-new Find other Clock buffers


  • 5 LVCMOS Outputs, DC to 200 MHz
  • Universal Input
    • LVPECL
    • LVDS
    • HCSL
    • SSTL
    • LVCMOS and LVTTL
  • Crystal Oscillator Interface
    • Crystal Input Frequency: 10 to 40 MHz
  • Output Skew: 6 ps
  • Additive Phase Jitter
    • 30 fs at 156.25 MHz (12 kHz to 20 MHz)
  • Low Propagation Delay
  • Operates With 3.3 or 2.5-V Core Supply Voltage
  • Adjustable Output Power Supply
    • 1.5 V, 1.8 V, 2.5 V, and 3.3 V for Each Bank
  • 24-Pin WQFN Package (4.0 mm × 4.0 mm ×
    0.8 mm)
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The LMK00105 is a high-performance, low-noise LVCMOS fanout buffer which can distribute five ultra-low jitter clocks from a differential, single-ended, or crystal input. The LMK00105 supports synchronous output enable for glitch-free operation. The ultra low-skew, low-jitter, and high PSRR make this buffer ideally suited for various networking, telecom, server and storage area networking, RRU LO reference distribution, medical and test equipment applications.

The core voltage can be set to 2.5 or 3.3 V, while the output voltage can be set to 1.5, 1.8, 2.5 or 3.3 V. The LMK00105 can be easily configured through pin programming.

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Technical documentation

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Type Title Date
* Data sheet LMK00105 Ultra-Low Jitter LVCMOS Fanout Buffer and Level Translator With Universal Input datasheet (Rev. G) Dec. 16, 2014
User guide LMK00105 User’s Guide (Rev. A) Jul. 01, 2019

Design & development

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Hardware development

document-generic User guide

The LMK00105 Evaluation Board simplifies evaluation of the LMK00105 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input. Configuring and controlling the board is accomplished using on board switches.

Design tools & simulation

SNAM058A.ZIP (70 KB) - IBIS Model
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CAD/CAE symbols

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WQFN (RTW) 24 View options

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