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EVALUATION BOARD Download 199
SIMULATION MODEL Download
The LMK00105 Evaluation Board simplifies evaluation of the LMK00105 Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input. Configuring and controlling the board is accomplished using on board switches.
SNAM058A.ZIP (70 KB) - IBIS Model SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
DESIGN TOOL Download
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
Clock tree architect programming software
CLOCK-TREE-ARCHITECT — Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
- Accepts customer specific design requirements such as input frequencies, output frequencies, clock formats and clock counts
- Generates clock trees by taking into account a variety of advanced specifications, such as noise floor and phase determinism requirements
- Presents clear and intuitive block (...)