Product details

Technology Family LSF Applications I2C Bits (#) 8 High input voltage (Min) (Vih) 0.95 High input voltage (Max) (Vih) 5 Vout (Min) (V) 0.95 Vout (Max) (V) 5 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Catalog
Technology Family LSF Applications I2C Bits (#) 8 High input voltage (Min) (Vih) 0.95 High input voltage (Max) (Vih) 5 Vout (Min) (V) 0.95 Vout (Max) (V) 5 IOH (Max) (mA) 0 IOL (Max) (mA) 0 Rating Catalog
TSSOP (PW) 20 42 mm² 6.5 x 6.4 VQFN (RKS) 20 11 mm² 4.5 x 2.5
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30pF cap load and up To 40-MHz up/down translation at 50pF cap load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low RON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C Operating temperature range
  • Provides bidirectional voltage translation with no direction pin
  • Supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30pF cap load and up To 40-MHz up/down translation at 50pF cap load
  • Allows bidirectional voltage-level translation between
    • 0.95 V ↔ 1.8/2.5/3.3/5 V
    • 1.2 V ↔ 1.8/2.5/3.3/5 V
    • 1.8 V ↔ 2.5/3.3/5 V
    • 2.5 V ↔ 3.3/5 V
    • 3.3 V ↔ 5 V
  • Low standby current
  • 5-V tolerance I/O port to support TTL
  • Low RON provides less signal distortion
  • High-impedance I/O pins for EN = Low
  • Flow-through pinout for easy PCB trace routing
  • Latch-up performance >100 mA per JESD 17
  • –40°C to 125°C Operating temperature range

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I2C, SMBus, etc.). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30pF cap load and up to 40-MHz up/down translation at 50pF cap load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

The LSF family of devices supports bidirectional voltage translation without the need for DIR pin which minimizes system effort (for PMBus, I2C, SMBus, etc.). The LSF family of devices supports up to 100-MHz up translation and greater than 100-MHz down translation at ≤ 30pF cap load and up to 40-MHz up/down translation at 50pF cap load which allows the LSF family to support more consumer or telecom interfaces (MDIO or SDIO).

LSF family supports 5-V tolerance on I/O port which makes it compatible with TTL levels in industrial and telecom applications. The LSF family is able to set up different voltage translation levels on each channel which makes it very flexible.

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Technical documentation

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Type Title Date
* Data sheet LSF010x 1/2/8 Channel Auto-Bidirectional Multi-Voltage Level Translator for Open-Drain and Push-Pull Applications datasheet (Rev. K) 03 May 2021
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Factors Affecting VOL for TXS and LSF Auto-bidirectional Translation Devices 19 Nov 2017
Application note Biasing Requirements for TXS, TXB, and LSF Auto-Bidirectional Translators 30 Oct 2017
User guide LSF-EVM Hardware User's Guide 05 Jul 2017
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
User guide LSF010X Evaluation Module User's Guide (Rev. A) 29 Jun 2015
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 30 Apr 2015
Application note Voltage-Level Translation With the LSF Family (Rev. B) 12 Mar 2015
Technical article Complex translation made simple 23 Jul 2014
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, P, N, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
In stock
Limit: 5
Evaluation board

LSF-EVM — 1 to 8-bit LSF Translator Family Evaluation Module

The LSF family of devices are level translators that support a voltage range of 0.95V and 5V and provide multi-voltage bidirectional translation without a direction pin.

The LSF-EVM comes populated with the LSF0108PWR device and has landing patterns that are compatible with the LSF0101DRYR (...)

In stock
Limit: 5
Simulation model

LSF0108 IBIS Model (Rev. A)

SDLM022A.ZIP (56 KB) - IBIS Model
Package Pins Download
TSSOP (PW) 20 View options
VQFN (RKS) 20 View options

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