SN54AHCT00

ACTIVE

Quadruple 2-Input Positive-NAND Gates

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Product details

Parameters

Technology Family AHCT VCC (Min) (V) 4.5 VCC (Max) (V) 5.5 Channels (#) 4 Inputs per channel 2 IOL (Max) (mA) 8 IOH (Max) (mA) -8 Input type TTL-Compatible CMOS Output type Push-Pull Features Over-Voltage Tolerant Inputs, Very High Speed (tpd 5-10ns) Data rate (Max) (Mbps) 70 Rating Military Operating temperature range (C) -55 to 125 open-in-new Find other NAND gate

Package | Pins | Size

CDIP (J) 14 130 mm² 19.94 x 6.73 CFP (W) 14 55 mm² 9.2 x 6.39 LCCC (FK) 20 79 mm² 8.89 x 8.89 open-in-new Find other NAND gate

Features

  • Inputs Are TTL-Voltage Compatible
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

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Description

The ’AHCT00 devices perform the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic.

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Technical documentation

= Top documentation for this product selected by TI
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Type Title Date
* Datasheet SN54AHCT00, SN74AHCT00 datasheet (Rev. K) Jul. 01, 2003
* SMD SN54AHCT00 SMD 5962-96823 Jun. 21, 2016
Technical articles How to keep your motor running safely Jun. 04, 2020
Selection guide Little Logic Guide 2018 (Rev. G) Jul. 06, 2018
Selection guide Logic Guide (Rev. AB) Jun. 12, 2017
Application note How to Select Little Logic (Rev. A) Jul. 26, 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guide LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
More literature Design Summary for WCSP Little Logic (Rev. B) Nov. 04, 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application note Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) Dec. 02, 2002
Application note Texas Instruments Little Logic Application Report Nov. 01, 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
User guide AHC/AHCT Designer's Guide February 2000 (Rev. D) Feb. 24, 2000
More literature Military Advanced High-Speed CMOS Logic (AHC/AHCT) Apr. 01, 1998
More literature Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) Apr. 01, 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices Dec. 01, 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application note Live Insertion Oct. 01, 1996

Design & development

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CAD/CAE symbols

Package Pins Download
CDIP (J) 14 View options
CFP (W) 14 View options
LCCC (FK) 20 View options

Ordering & quality

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  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring

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