SN54HC367

ACTIVE

Hex Bus Drivers With 3-State Outputs

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Product details

Parameters

Technology Family HC VCC (Min) (V) 2 VCC (Max) (V) 6 Channels (#) 6 IOL (Max) (mA) 6 ICC (Max) (uA) 80 IOH (Max) (mA) -6 Input type Standard CMOS Output type 3-State Features Balanced outputs, Very high speed (tpd 5-10ns) Data rate (Mbps) 56 Rating Military open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

CDIP (J) 16 135 mm² 19.65 x 6.92 open-in-new Find other Non-Inverting buffer/driver

Features

  • Wide Operating Voltage Range of 2 V to 6 V
  • High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive Up To 15 LSTTL Loads
  • True Outputs
  • Low Power Consumption, 80-µA Max ICC
  • Typical tpd = 10 ns
  • ±6-mA Output Drive at 5 V
  • Low Input Current of 1 µA Max

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Description

These hex buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HC367 devices are organized as dual 4-line and 2-line buffers/drivers with active-low output-enable (1OE\ and 2OE\) inputs. When OE\ is low, the device passes noninverted data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

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Technical documentation

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Type Title Date
* Datasheet SN54HC367, SN74HC367 datasheet (Rev. D) Sep. 26, 2003
* SMD SN54HC367 SMD 8500201EA Jun. 21, 2016
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
User guides Signal Switch Data Book (Rev. A) Nov. 14, 2003
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes CMOS Power Consumption and CPD Calculation (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes SN54/74HCT CMOS Logic Family Applications and Restrictions May 01, 1996
Application notes Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc Apr. 01, 1996

Design & development

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CDIP (J) 16 View options

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