Product details

Technology Family TTL Supply voltage (Min) (V) 4.75 Supply voltage (Max) (V) 5.25 Number of channels (#) 6 IOL (Max) (mA) 16 IOH (Max) (mA) -0.8 ICC (Max) (uA) 60000 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns) Rating Catalog
Technology Family TTL Supply voltage (Min) (V) 4.75 Supply voltage (Max) (V) 5.25 Number of channels (#) 6 IOL (Max) (mA) 16 IOH (Max) (mA) -0.8 ICC (Max) (uA) 60000 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10-50ns) Rating Catalog
PDIP (N) 14 181 mm² 19.3 x 9.4 SOIC (D) 14 52 mm² 8.65 x 6 SOP (NS) 14 80 mm² 10.2 x 7.8
  • Operation From Very Slow Edges
  • Improved Line-Receiving Characteristics
  • High Noise Immunity
  • Operation From Very Slow Edges
  • Improved Line-Receiving Characteristics
  • High Noise Immunity

Each circuit in SNx414 and SNx4LS14 functions as an inverter. However, because of the Schmitt-Trigger action, they have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals.

Each circuit in SNx414 and SNx4LS14 functions as an inverter. However, because of the Schmitt-Trigger action, they have different input threshold levels for positive-going (VT+) and negative-going (VT–) signals.

These circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean, jitter-free output signals.

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Technical documentation

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Type Title Date
* Data sheet SNx414 and SNx4LS14 Hex Schmitt-Trigger Inverters datasheet (Rev. C) 30 Nov 2016
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
Application note Understanding Schmitt Triggers 21 Sep 2011
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Generic Logic EVM Supporting 14 through 24 Pin PW, DB, D, DW, NS, DYY, and DGV Packages

This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, DYY or DGV package in a 14 to 24 pin count.

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Simulation model

SN7414 Behavioral SPICE Model

SDLM068.ZIP (7 KB) - PSpice Model
Package Pins Download
PDIP (N) 14 View options
SO (NS) 14 View options
SOIC (D) 14 View options

Ordering & quality

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