SN74ABT827

ACTIVE

10-Bit Buffers/Drivers With 3-State Outputs

Top

Product details

Parameters

Technology Family ABT VCC (Min) (V) 4.5 VCC (Max) (V) 5.5 Channels (#) 10 IOL (Max) (mA) 64 ICC (Max) (uA) 40000 IOH (Max) (mA) -32 Input type TTL-Compatible CMOS Output type 3-State Features Ultra high speed (tpd <5ns), Partial power down (Ioff), Over-voltage tolerant inputs Data rate (Mbps) 300 Rating Catalog open-in-new Find other Non-Inverting buffer/driver

Package | Pins | Size

SOIC (DW) 24 160 mm² 15.5 x 10.3 SSOP (DB) 24 64 mm² 8.2 x 7.8 TSSOP (PW) 24 34 mm² 4.4 x 7.8 open-in-new Find other Non-Inverting buffer/driver

Features

  • State-of-the-Art EPIC-IIB™ BiCMOS Design Significantly Reduces Power Dissipation
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
  • Typical VOLP (Output Ground Bounce) < 1 V at VCC = 5 V, TA = 25°C
  • High-Impedance State During Power Up and Power Down
  • High-Drive Outputs (-32-mA IOH, 64-mA IOL)
  • Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Plastic (NT) and Ceramic (JT) DIPs

EPIC-IIB is a trademark of Texas Instruments.

open-in-new Find other Non-Inverting buffer/driver

Description

These 10-bit buffers or bus drivers provide a high-performance bus interface for wide data paths or buses carrying parity.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1\ or OE2\) input is high, all ten outputs are in the high-impedance state. The 'ABT827 provide true data at the outputs.

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 2.1 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT827 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74ABT827 is characterized for operation from -40°C to 85°C.

open-in-new Find other Non-Inverting buffer/driver
Download

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 20
Type Title Date
* Datasheet SN54ABT827, SN74ABT827 datasheet (Rev. E) Apr. 06, 2005
Selection guides Logic Guide (Rev. AB) Jun. 12, 2017
Application notes Implications of Slow or Floating CMOS Inputs (Rev. D) Jun. 23, 2016
Application notes Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) Dec. 02, 2015
User guides LOGIC Pocket Data Book (Rev. B) Jan. 16, 2007
Application notes Semiconductor Packing Material Electrostatic Discharge (ESD) Protection Jul. 08, 2004
Application notes Selecting the Right Level Translation Solution (Rev. A) Jun. 22, 2004
Application notes Quad Flatpack No-Lead Logic Packages (Rev. D) Feb. 16, 2004
More literature Logic Cross-Reference (Rev. A) Oct. 07, 2003
Application notes TI IBIS File Creation, Validation, and Distribution Processes Aug. 29, 2002
Application notes Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices May 10, 2002
Selection guides Advanced Bus Interface Logic Selection Guide Jan. 09, 2001
Application notes Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) Aug. 01, 1997
Application notes Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B) Jun. 01, 1997
Application notes Designing With Logic (Rev. C) Jun. 01, 1997
Application notes Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A) Mar. 01, 1997
Application notes Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A) Dec. 01, 1996
Application notes Input and Output Characteristics of Digital Integrated Circuits Oct. 01, 1996
Application notes Live Insertion Oct. 01, 1996
Application notes Understanding Advanced Bus-Interface Products Design Guide May 01, 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
10
Description
This EVM is designed to support any logic device that has a D, DW, DB, NS, PW, P, N, or DGV package in a 14 to 24 pin count.
Features
  • Board design allows for versatility in evaluation
  • Supports a wide-range of logic devices

Design tools & simulation

SIMULATION MODELS Download
SCBM136.ZIP (7 KB) - PSpice Model

CAD/CAE symbols

Package Pins Download
SOIC (DW) 24 View options
SSOP (DB) 24 View options
TSSOP (PW) 24 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Related videos