These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
When the output-enable (OE)\ is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. A high on (OE)\ disables the device so that the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, (OE)\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
|Part number||Order||Technology Family||VCC (Min) (V)||VCC (Max) (V)||Bits (#)||Voltage (Nom) (V)||F @ nom voltage (Max) (MHz)||ICC @ nom voltage (Max) (mA)||tpd @ nom Voltage (Max) (ns)||IOL (Max) (mA)||IOH (Max) (mA)||Rating||Operating temperature range (C)|
||ACT||2||6||8||5||90||0.04||9||24||-24||Catalog||-40 to 85|
|SN54ACT245||Samples not available||ACT||4.5||5.5||8||5||90||0.04||9||24||-24||Military||-55 to 125|